薄膜全耗尽SOI CMOS技术，器件和电路LVLP模拟/数字/微波应用

1998 International Semiconductor Conference. CAS'98 Proceedings (Cat. No.98TH8351) Pub Date : 1998-10-06 DOI:10.1109/SMICND.1998.732302

D. Flandre, D. Vanhoenacker

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引用次数: 1

摘要

本文表明，完全耗尽绝缘体上硅技术为低压、低功耗CMOS电路领域提供了独特的机会，允许在低电源电压下混合制造和运行模拟、数字和微波元件，其性能明显优于在体CMOS上获得的性能。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Thin-film fully-depleted SOI CMOS technology, devices and circuits for LVLP analog/digital/microwave applications

This paper demonstrates that fully-depleted silicon-on-insulator technology offers unique opportunities in the field of low-voltage, low-power CMOS circuits, allowing for the mixed fabrication and operation under low supply voltage of analog, digital and microwave components with properties significantly superior to those obtained on bulk CMOS.

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来源期刊

1998 International Semiconductor Conference. CAS'98 Proceedings (Cat. No.98TH8351)

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