{"title":"一种用于抖动测量的2ps分辨率宽范围BIST电路","authors":"N. Cheng, Yu Lee, Ji-Jan Chen","doi":"10.1109/ATS.2007.46","DOIUrl":null,"url":null,"abstract":"In this paper, we propose a novel built-in self-test (BIST) circuit to directly measure cycle-to-cycle jitter. The clock-under-test is under-sampled by this measurement circuit and the jitter values are transformed into digital words. A time-amplified technique is applied to obtain relatively higher resolution with smaller hardware overhead. Experimental results show that our proposed circuit is able to measure the jitter providing the clock frequency up to 2 GHz with resolution of 2 picoseconds.","PeriodicalId":289969,"journal":{"name":"16th Asian Test Symposium (ATS 2007)","volume":"207 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 2-ps Resolution Wide Range BIST Circuit for Jitter Measurement\",\"authors\":\"N. Cheng, Yu Lee, Ji-Jan Chen\",\"doi\":\"10.1109/ATS.2007.46\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we propose a novel built-in self-test (BIST) circuit to directly measure cycle-to-cycle jitter. The clock-under-test is under-sampled by this measurement circuit and the jitter values are transformed into digital words. A time-amplified technique is applied to obtain relatively higher resolution with smaller hardware overhead. Experimental results show that our proposed circuit is able to measure the jitter providing the clock frequency up to 2 GHz with resolution of 2 picoseconds.\",\"PeriodicalId\":289969,\"journal\":{\"name\":\"16th Asian Test Symposium (ATS 2007)\",\"volume\":\"207 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-10-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"16th Asian Test Symposium (ATS 2007)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.2007.46\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"16th Asian Test Symposium (ATS 2007)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2007.46","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 2-ps Resolution Wide Range BIST Circuit for Jitter Measurement
In this paper, we propose a novel built-in self-test (BIST) circuit to directly measure cycle-to-cycle jitter. The clock-under-test is under-sampled by this measurement circuit and the jitter values are transformed into digital words. A time-amplified technique is applied to obtain relatively higher resolution with smaller hardware overhead. Experimental results show that our proposed circuit is able to measure the jitter providing the clock frequency up to 2 GHz with resolution of 2 picoseconds.