{"title":"纳米级双栅mosfet的物理器件模型","authors":"Qiang Chen, Lihui Wang, J. Meindl","doi":"10.1109/ICICDT.2004.1309911","DOIUrl":null,"url":null,"abstract":"Compact, physics-based models of subthreshold swing and threshold voltage are presented for undoped double-gate (DG) MOSFETs in symmetric, asymmetric, and ground-plane modes of operation. Applying the new device models, a novel scale-length based methodology is demonstrated to comprehensively and exhaustively investigate threshold voltage variations in DG MOSFETs. In light of ultra-thin silicon film used as the channel and possible introduction of high-permittivity gate dielectrics, physical, analytical models of quantum mechanical effects, gate direct tunneling current, and fringe-induced barrier lowering effect are developed to assess their impact on DG MOSFET scalability. Scaling limits projections indicate that individual DG MOSFET's with good turn-off behavior are feasible at 10nm scale; however, practical exploitation of these devices toward gigascale integrated systems requires significant improvement in process control.","PeriodicalId":158994,"journal":{"name":"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)","volume":"145 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Physics-based device models for nanoscale double-gate MOSFETs\",\"authors\":\"Qiang Chen, Lihui Wang, J. Meindl\",\"doi\":\"10.1109/ICICDT.2004.1309911\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Compact, physics-based models of subthreshold swing and threshold voltage are presented for undoped double-gate (DG) MOSFETs in symmetric, asymmetric, and ground-plane modes of operation. Applying the new device models, a novel scale-length based methodology is demonstrated to comprehensively and exhaustively investigate threshold voltage variations in DG MOSFETs. In light of ultra-thin silicon film used as the channel and possible introduction of high-permittivity gate dielectrics, physical, analytical models of quantum mechanical effects, gate direct tunneling current, and fringe-induced barrier lowering effect are developed to assess their impact on DG MOSFET scalability. Scaling limits projections indicate that individual DG MOSFET's with good turn-off behavior are feasible at 10nm scale; however, practical exploitation of these devices toward gigascale integrated systems requires significant improvement in process control.\",\"PeriodicalId\":158994,\"journal\":{\"name\":\"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)\",\"volume\":\"145 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-10-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICDT.2004.1309911\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICDT.2004.1309911","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Physics-based device models for nanoscale double-gate MOSFETs
Compact, physics-based models of subthreshold swing and threshold voltage are presented for undoped double-gate (DG) MOSFETs in symmetric, asymmetric, and ground-plane modes of operation. Applying the new device models, a novel scale-length based methodology is demonstrated to comprehensively and exhaustively investigate threshold voltage variations in DG MOSFETs. In light of ultra-thin silicon film used as the channel and possible introduction of high-permittivity gate dielectrics, physical, analytical models of quantum mechanical effects, gate direct tunneling current, and fringe-induced barrier lowering effect are developed to assess their impact on DG MOSFET scalability. Scaling limits projections indicate that individual DG MOSFET's with good turn-off behavior are feasible at 10nm scale; however, practical exploitation of these devices toward gigascale integrated systems requires significant improvement in process control.