{"title":"LDMOS输出驱动器具有低压导通现象的异常ESD失效模式","authors":"Jaeyoung Park, M. Orshansky","doi":"10.1109/IRPS.2012.6241891","DOIUrl":null,"url":null,"abstract":"An abnormal ESD failure mode caused by a low-voltage turn-on phenomenon in an LDMOS is found on a DC-DC converter chip. Experimental investigation has shown that gate-coupling is the root cause of such low-voltage turn-on behavior. To prevent this behavior, a novel gate turn-off circuit is proposed. The solution is effective: the test chip measurements show an increase in HBM values from 1500 V to 4000 V.","PeriodicalId":341663,"journal":{"name":"2012 IEEE International Reliability Physics Symposium (IRPS)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Abnormal ESD failure mode with low-voltage turn-on phenomenon of LDMOS output driver\",\"authors\":\"Jaeyoung Park, M. Orshansky\",\"doi\":\"10.1109/IRPS.2012.6241891\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An abnormal ESD failure mode caused by a low-voltage turn-on phenomenon in an LDMOS is found on a DC-DC converter chip. Experimental investigation has shown that gate-coupling is the root cause of such low-voltage turn-on behavior. To prevent this behavior, a novel gate turn-off circuit is proposed. The solution is effective: the test chip measurements show an increase in HBM values from 1500 V to 4000 V.\",\"PeriodicalId\":341663,\"journal\":{\"name\":\"2012 IEEE International Reliability Physics Symposium (IRPS)\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-04-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE International Reliability Physics Symposium (IRPS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRPS.2012.6241891\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International Reliability Physics Symposium (IRPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRPS.2012.6241891","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Abnormal ESD failure mode with low-voltage turn-on phenomenon of LDMOS output driver
An abnormal ESD failure mode caused by a low-voltage turn-on phenomenon in an LDMOS is found on a DC-DC converter chip. Experimental investigation has shown that gate-coupling is the root cause of such low-voltage turn-on behavior. To prevent this behavior, a novel gate turn-off circuit is proposed. The solution is effective: the test chip measurements show an increase in HBM values from 1500 V to 4000 V.