Concepción Sanz, M. Prieto, A. Papanikolaou, M. Corbalan, F. Catthoor
{"title":"动态应用程序内存组织的系统级过程可变性补偿:一个案例研究","authors":"Concepción Sanz, M. Prieto, A. Papanikolaou, M. Corbalan, F. Catthoor","doi":"10.1109/ISQED.2006.129","DOIUrl":null,"url":null,"abstract":"Process variability and the dynamism of new applications have a tremendous impact on both the performance and the energy consumption of memory organizations of embedded systems. In this paper, we explore the combination of code transformations at compilation time and architectural-level techniques to tackle both problems, introducing a new methodology to combine them in an integrated and coordinated way. Our approach manages to reduce significantly the energy overhead associated to both variability and application dynamism (up to 50% according to our simulations) without compromising the application timing constraints","PeriodicalId":138839,"journal":{"name":"7th International Symposium on Quality Electronic Design (ISQED'06)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-03-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"System-level process variability compensation on memory organizations of dynamic applications: a case study\",\"authors\":\"Concepción Sanz, M. Prieto, A. Papanikolaou, M. Corbalan, F. Catthoor\",\"doi\":\"10.1109/ISQED.2006.129\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Process variability and the dynamism of new applications have a tremendous impact on both the performance and the energy consumption of memory organizations of embedded systems. In this paper, we explore the combination of code transformations at compilation time and architectural-level techniques to tackle both problems, introducing a new methodology to combine them in an integrated and coordinated way. Our approach manages to reduce significantly the energy overhead associated to both variability and application dynamism (up to 50% according to our simulations) without compromising the application timing constraints\",\"PeriodicalId\":138839,\"journal\":{\"name\":\"7th International Symposium on Quality Electronic Design (ISQED'06)\",\"volume\":\"34 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-03-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"7th International Symposium on Quality Electronic Design (ISQED'06)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISQED.2006.129\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"7th International Symposium on Quality Electronic Design (ISQED'06)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2006.129","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
System-level process variability compensation on memory organizations of dynamic applications: a case study
Process variability and the dynamism of new applications have a tremendous impact on both the performance and the energy consumption of memory organizations of embedded systems. In this paper, we explore the combination of code transformations at compilation time and architectural-level techniques to tackle both problems, introducing a new methodology to combine them in an integrated and coordinated way. Our approach manages to reduce significantly the energy overhead associated to both variability and application dynamism (up to 50% according to our simulations) without compromising the application timing constraints