{"title":"高性能高可靠0.18/spl mu/m双栅CMOS的晶粒生长控制栅电极工程","authors":"Shimizu, Kuroi, Sayama, Furukawa, Nishida, Inoue, Inuishi, Nishimura","doi":"10.1109/VLSIT.1997.623718","DOIUrl":null,"url":null,"abstract":"Advanced gate electrode engineering is demonstrated to overcome the key issues of dual gate CMOS with thin gate oxide film. Using the small-grain-size polysilicon for the gate electrode, not only the suppression of gate depletion but also the stability of threshold voltage can be achieved as well as the improvement of the gate oxide integrity. Furthermore this successful implementation into 0.18pm CMOS is demonstrated with high performance and high reliability.","PeriodicalId":414778,"journal":{"name":"1997 Symposium on VLSI Technology","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Gate Electrode Engineering By Control Of Grain Growth For High Performance And High Reliable 0.18/spl mu/m Dual Gate CMOS\",\"authors\":\"Shimizu, Kuroi, Sayama, Furukawa, Nishida, Inoue, Inuishi, Nishimura\",\"doi\":\"10.1109/VLSIT.1997.623718\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Advanced gate electrode engineering is demonstrated to overcome the key issues of dual gate CMOS with thin gate oxide film. Using the small-grain-size polysilicon for the gate electrode, not only the suppression of gate depletion but also the stability of threshold voltage can be achieved as well as the improvement of the gate oxide integrity. Furthermore this successful implementation into 0.18pm CMOS is demonstrated with high performance and high reliability.\",\"PeriodicalId\":414778,\"journal\":{\"name\":\"1997 Symposium on VLSI Technology\",\"volume\":\"54 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-06-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1997 Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.1997.623718\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1997 Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1997.623718","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Gate Electrode Engineering By Control Of Grain Growth For High Performance And High Reliable 0.18/spl mu/m Dual Gate CMOS
Advanced gate electrode engineering is demonstrated to overcome the key issues of dual gate CMOS with thin gate oxide film. Using the small-grain-size polysilicon for the gate electrode, not only the suppression of gate depletion but also the stability of threshold voltage can be achieved as well as the improvement of the gate oxide integrity. Furthermore this successful implementation into 0.18pm CMOS is demonstrated with high performance and high reliability.