基于二维工艺和器件仿真的Si-SiO/sub - 2/界面硼堆积分析

1996 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD '96 (IEEE Cat. No.96TH8095) Pub Date : 1996-09-02 DOI:10.1109/SISPAD.1996.865285

T. Hyodo, S. Taji, N. Yoshida, M. Kameda, H. Watanabe, I. Shiota

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引用次数: 0

摘要

通过过程模拟器计算出准确的沟道掺杂曲线是预测MOSFET阈值电压(Vth)的关键。然而，由于SIMS被认为是目前最准确的剖面技术，因此它不容易校准到测量值，在深度尺度上具有/spl plusmn/10%的误差，在浓度尺度上具有/spl plusmn/15%的误差。此外，近地表区域的测量浓度也不可靠。本文提出了SIMS剖面的校正方法。此外，通过校准好的通道掺杂谱，分析了位于Si- sio /sub - 2/界面Si侧的硼堆积层。

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Analysis of boron pile-up at the Si-SiO/sub 2/ interface using 2-D process and device simulation

An accurate channel doping profile calculated by a process simulator is essential to the prediction of MOSFET threshold voltage (Vth). However it can not be easily calibrated to measurements, since SIMS which is believed to be the most accurate profiling technique at present, has /spl plusmn/10% error on the depth scale, /spl plusmn/15% on the concentration scale. Moreover measured concentrations in the near-surface region are not reliable. In this study the correction method for SIMS profile is presented. Also by using well-calibrated channel doping profiles, the boron pile-up layer situated on the Si side of the Si-SiO/sub 2/ interface is analyzed.

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来源期刊

1996 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD '96 (IEEE Cat. No.96TH8095)

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