一种用于稳压器的低电压区、低噪声、低损耗功率MOSFET

2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-26 DOI:10.1109/ISPSD.2013.6694404

M. Masunaga, T. Hashimoto, Kouichi Kato, H. Andou, Hideo Numabe, Zen Tomizawa, N. Matsuura

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引用次数: 2

摘要

提出了一种具有低阈值电压(Vth)区的新型低压功率MOSFET (sub-MOS)。所提出的MOSFET在输出效率和开关噪声之间具有良好的权衡关系，其尖峰电压比传统MOSFET低82%，在输出电流为20 a的300 kHz时具有相同的效率。由于所提出的器件通过子mos的假导通降低了漏极电流通过率(dir/dt)，因此在二极管反向恢复期间降低了尖峰电压。利用子mos的饱和电流抑制误导通损耗，通过优化子mos的面积和Vth来控制饱和电流。子mos的低导通电阻补偿了误导通的损耗，实现了高效率。

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A low noise and low loss power MOSFET with low Vth regions for voltage regulators

A novel low voltage power MOSFET with a low threshold voltage (Vth) region (sub-MOS) is proposed. The proposed MOSFET has a superior trade-off relationship between output efficiency and switching noise, with a spike voltage 82% lower than a conventional MOSFET and the same efficiency at 300 kHz with an output current of 20 A. Since the proposed device reduces the drain current through rate (dir/dt) by false turn-on of the sub-MOS, it decreases the spike voltage during diode reverse recovery. The false turn-on losses are suppressed by the saturation current of the sub-MOS, which is controlled by optimizing the sub-MOS area and the Vth. The low on-state resistance of sub-MOS compensates for the false turn-on losses to achieve high efficiency.

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来源期刊

2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)

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