{"title":"SDRAM, DDR2和DDR3存储器的单事件测试","authors":"S. Guertin, Mehran Amrbar","doi":"10.1109/NSREC.2016.7891742","DOIUrl":null,"url":null,"abstract":"SEE test results are presented for SDRAM, DDR2, and DDR3. No tested devices exhibited SEL. SBUs were observed, but no MBUs were observed in data words. SEFI data were taken at low and high speed.","PeriodicalId":135325,"journal":{"name":"2016 IEEE Radiation Effects Data Workshop (REDW)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Single Event Testing of SDRAM, DDR2 and DDR3 Memories\",\"authors\":\"S. Guertin, Mehran Amrbar\",\"doi\":\"10.1109/NSREC.2016.7891742\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"SEE test results are presented for SDRAM, DDR2, and DDR3. No tested devices exhibited SEL. SBUs were observed, but no MBUs were observed in data words. SEFI data were taken at low and high speed.\",\"PeriodicalId\":135325,\"journal\":{\"name\":\"2016 IEEE Radiation Effects Data Workshop (REDW)\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-07-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Radiation Effects Data Workshop (REDW)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NSREC.2016.7891742\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Radiation Effects Data Workshop (REDW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NSREC.2016.7891742","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Single Event Testing of SDRAM, DDR2 and DDR3 Memories
SEE test results are presented for SDRAM, DDR2, and DDR3. No tested devices exhibited SEL. SBUs were observed, but no MBUs were observed in data words. SEFI data were taken at low and high speed.