一种新颖的低阻栅极填充物,用于20nm及以上栅极长度缩放,用于栅极末高k/金属栅极CMOS技术

U. Kwon, K. Wong, S. Krishnan, L. Econimikos, X. Zhang, C. Ortolland, L. Thanh, J. Laloe, J. Huang, L. Edge, H. M. Wang, M. Gribelyuk, D. Rath, R. Bingert, Y. Liu, R. Bao, I. Kim, R. Ramachandran, W. Lai, J. Cutler, D. S. Salvador, Y. Zhang, J. Muncy, V. Paruchuri, M. Krishnan, V. Narayanan, R. Divakaruni, X. Chen, M. Chudzik
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引用次数: 4

摘要

替代金属栅极(RMG)工艺要求在工作功能调谐金属的顶部填充低电阻材料。传统的基于钛(Ti)-铝(Al)的RMG金属填充方案用于低电阻栅极形成,随着栅极长度在20nm节点及以上的进一步缩放,该方案变得具有挑战性。在这项工作中,我们演示了竞争低电阻门形成小于25 nm Lgate使用基于一本小说(Co)铝钴金属填充方案极端长度伸缩门。本文还讨论了CMP在实施中所面临的挑战,以及对这种新的低电阻填充方案的电阻和器件特性的评估。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A novel low resistance gate fill for extreme gate length scaling at 20nm and beyond for gate-last high-k/metal gate CMOS technology
Replacement metal gate (RMG) process requires gate fill with low resistance materials on top of work function tuning metals. Conventional titanium (Ti)-aluminum (Al) based RMG metal fill scheme for low resistance gate formation becomes challenging with further gate length scaling for 20nm node and beyond. In this work, we have demonstrated competitive low resistance gate formation at smaller than 25nm Lgate using a novel cobalt (Co)-aluminum based metal fill scheme for extreme gate length scaling. Challenges in CMP for the implementation as well as assessment on resistance and device characteristics of this new low resistance fill scheme are also discussed.
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