W. Graf, O. Genz, D. Kohler, H. Prenz, K. Schupke, A. Laessig, L. Bartholomaeus
{"title":"低电容高选择性自对准触点工艺的缩放","authors":"W. Graf, O. Genz, D. Kohler, H. Prenz, K. Schupke, A. Laessig, L. Bartholomaeus","doi":"10.1109/IITC.2007.382369","DOIUrl":null,"url":null,"abstract":"A novel self aligned contact integration manufacturing method with oxide spacer is presented. Two main issues of conventional self aligned contacts are solved: high parasitic capacitive coupling through the nitride spacer and the small process window of the SAC etch. Parasitic coupling was reduced by 34 %. For the first time self aligned contacts with oxide spacer are used in DRAM production on 90 and 75 nm. The technology is seen to be extendible to 40 nm and below.","PeriodicalId":403602,"journal":{"name":"2007 IEEE International Interconnect Technology Conferencee","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Scaling of a Low Capacitance Highly Selective Self Aligned Contact Process\",\"authors\":\"W. Graf, O. Genz, D. Kohler, H. Prenz, K. Schupke, A. Laessig, L. Bartholomaeus\",\"doi\":\"10.1109/IITC.2007.382369\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel self aligned contact integration manufacturing method with oxide spacer is presented. Two main issues of conventional self aligned contacts are solved: high parasitic capacitive coupling through the nitride spacer and the small process window of the SAC etch. Parasitic coupling was reduced by 34 %. For the first time self aligned contacts with oxide spacer are used in DRAM production on 90 and 75 nm. The technology is seen to be extendible to 40 nm and below.\",\"PeriodicalId\":403602,\"journal\":{\"name\":\"2007 IEEE International Interconnect Technology Conferencee\",\"volume\":\"62 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-06-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE International Interconnect Technology Conferencee\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IITC.2007.382369\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE International Interconnect Technology Conferencee","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IITC.2007.382369","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Scaling of a Low Capacitance Highly Selective Self Aligned Contact Process
A novel self aligned contact integration manufacturing method with oxide spacer is presented. Two main issues of conventional self aligned contacts are solved: high parasitic capacitive coupling through the nitride spacer and the small process window of the SAC etch. Parasitic coupling was reduced by 34 %. For the first time self aligned contacts with oxide spacer are used in DRAM production on 90 and 75 nm. The technology is seen to be extendible to 40 nm and below.
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