材料对Cu/低钾芯片FC-PBGA封装可靠性的影响

Li Li, J. Xue, M. Ahmad, M. Brillhart, Min Ding, G. Lu, P. Ho
{"title":"材料对Cu/低钾芯片FC-PBGA封装可靠性的影响","authors":"Li Li, J. Xue, M. Ahmad, M. Brillhart, Min Ding, G. Lu, P. Ho","doi":"10.1109/ECTC.2006.1645869","DOIUrl":null,"url":null,"abstract":"Reliability of the flip-chip plastic ball grid array (FC-PBGA) packages is highly dependent on the properties of the constituent components and the interface formed between them. The relative mechanical compliances and thermal mismatch between the silicon chip, the underfill material and the organic laminate substrate are particularly important to the design and performance the package. Strong coupling between the chip and the substrate can cause chip cracking, delamination of interlayer dielectrics (ILD), delamination of underfill and problems associated with BGA interconnection when the package is assembled to a printed circuit board (PCB). The problem became more severe as we migrate to the 90nm and 65nm silicon technology nodes where low-k ILD is widely used. Combined experimental and modeling methods were used to investigate the thermo-mechanical behavior and failure mechanisms controlling FC-PBGA package reliability. Materials effect of new generation of underfill materials was first studied for minimizing the chip-substrate thermo-mechanical coupling. Fully assembled FC-PBGA packages with various underfill materials were evaluated following a carefully designed analysis and screening flow. Thermo-mechanical response of the package was measured and analyzed using high resolution moire interferometry and numerical modeling techniques. Four-point bending test was also used to characterize interfacial fracture energy for the critical interface between die passivation and underfill material. The experiments and modeling were correlated with the JEDEC standard component-level reliability testing results. The combined experimental and numerical analysis confirmed our selection of the substrate, underfill and other package materials and demonstrated that significantly improved reliability of the flip-chip PBGA packages can be achieved by controlling thermo-mechanical coupling of the silicon die and the package, and by controlling various important interfaces within the package","PeriodicalId":194969,"journal":{"name":"56th Electronic Components and Technology Conference 2006","volume":"77 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Materials effects on reliability of FC-PBGA packages for Cu/low-k chips\",\"authors\":\"Li Li, J. Xue, M. Ahmad, M. Brillhart, Min Ding, G. Lu, P. Ho\",\"doi\":\"10.1109/ECTC.2006.1645869\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Reliability of the flip-chip plastic ball grid array (FC-PBGA) packages is highly dependent on the properties of the constituent components and the interface formed between them. The relative mechanical compliances and thermal mismatch between the silicon chip, the underfill material and the organic laminate substrate are particularly important to the design and performance the package. Strong coupling between the chip and the substrate can cause chip cracking, delamination of interlayer dielectrics (ILD), delamination of underfill and problems associated with BGA interconnection when the package is assembled to a printed circuit board (PCB). The problem became more severe as we migrate to the 90nm and 65nm silicon technology nodes where low-k ILD is widely used. Combined experimental and modeling methods were used to investigate the thermo-mechanical behavior and failure mechanisms controlling FC-PBGA package reliability. Materials effect of new generation of underfill materials was first studied for minimizing the chip-substrate thermo-mechanical coupling. Fully assembled FC-PBGA packages with various underfill materials were evaluated following a carefully designed analysis and screening flow. Thermo-mechanical response of the package was measured and analyzed using high resolution moire interferometry and numerical modeling techniques. Four-point bending test was also used to characterize interfacial fracture energy for the critical interface between die passivation and underfill material. The experiments and modeling were correlated with the JEDEC standard component-level reliability testing results. The combined experimental and numerical analysis confirmed our selection of the substrate, underfill and other package materials and demonstrated that significantly improved reliability of the flip-chip PBGA packages can be achieved by controlling thermo-mechanical coupling of the silicon die and the package, and by controlling various important interfaces within the package\",\"PeriodicalId\":194969,\"journal\":{\"name\":\"56th Electronic Components and Technology Conference 2006\",\"volume\":\"77 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-07-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"56th Electronic Components and Technology Conference 2006\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.2006.1645869\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"56th Electronic Components and Technology Conference 2006","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2006.1645869","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12

摘要

倒装塑料球栅阵列(FC-PBGA)封装的可靠性在很大程度上取决于组成元件的性能和它们之间形成的界面。硅芯片、衬底材料和有机层压衬底之间的相对力学顺应性和热失配对封装的设计和性能尤为重要。当封装组装成印刷电路板(PCB)时,芯片和基板之间的强耦合可能导致芯片破裂、层间介电体(ILD)分层、衬底分层以及与BGA互连相关的问题。当我们迁移到广泛使用低k ILD的90nm和65nm硅技术节点时,问题变得更加严重。采用实验与建模相结合的方法,研究了控制FC-PBGA封装可靠性的热-力学行为和失效机制。为了最大限度地减小芯片-衬底热-力耦合,首次研究了新一代下填材料的材料效应。经过精心设计的分析和筛选流程,对各种下填材料的完全组装的FC-PBGA封装进行了评估。采用高分辨率云纹干涉法和数值模拟技术对封装的热机械响应进行了测量和分析。采用四点弯曲试验对模具钝化与下填料临界界面的断裂能进行表征。实验和建模结果与JEDEC标准部件级可靠性测试结果相吻合。实验和数值分析相结合,证实了我们对衬底、衬底和其他封装材料的选择,并表明通过控制硅晶片与封装的热-机械耦合,以及控制封装内各种重要接口,可以显著提高倒装PBGA封装的可靠性
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Materials effects on reliability of FC-PBGA packages for Cu/low-k chips
Reliability of the flip-chip plastic ball grid array (FC-PBGA) packages is highly dependent on the properties of the constituent components and the interface formed between them. The relative mechanical compliances and thermal mismatch between the silicon chip, the underfill material and the organic laminate substrate are particularly important to the design and performance the package. Strong coupling between the chip and the substrate can cause chip cracking, delamination of interlayer dielectrics (ILD), delamination of underfill and problems associated with BGA interconnection when the package is assembled to a printed circuit board (PCB). The problem became more severe as we migrate to the 90nm and 65nm silicon technology nodes where low-k ILD is widely used. Combined experimental and modeling methods were used to investigate the thermo-mechanical behavior and failure mechanisms controlling FC-PBGA package reliability. Materials effect of new generation of underfill materials was first studied for minimizing the chip-substrate thermo-mechanical coupling. Fully assembled FC-PBGA packages with various underfill materials were evaluated following a carefully designed analysis and screening flow. Thermo-mechanical response of the package was measured and analyzed using high resolution moire interferometry and numerical modeling techniques. Four-point bending test was also used to characterize interfacial fracture energy for the critical interface between die passivation and underfill material. The experiments and modeling were correlated with the JEDEC standard component-level reliability testing results. The combined experimental and numerical analysis confirmed our selection of the substrate, underfill and other package materials and demonstrated that significantly improved reliability of the flip-chip PBGA packages can be achieved by controlling thermo-mechanical coupling of the silicon die and the package, and by controlling various important interfaces within the package
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信