近轨电压CMOS参考电压缓冲器设计

2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2020-10-23 DOI:10.1109/ICICM50929.2020.9292131

Qihao Yin, Chunfeng Bai

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引用次数: 0

摘要

本文提出了一种CMOS近轨电压缓冲器。与传统的基于ota的结构相比，在环路中增加了一个超级源从动器，因此即使在输入电压非常接近电源电压或地时，也能保持相当高的环路增益。缓冲电压与导轨之间的压降可低至10mv。此外，由于所提出的缓冲器需要更大的负载电容，因此可以降低输出阻抗。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A CMOS Reference Voltage Buffer Designed for Near-rail Voltage

This paper presents a CMOS buffer for near-rail voltage. Compared with conventional OTA-based structure, an additional super source follower is added in the loop, which hence maintains fairly high loop-gain even when the input voltage is very close to the power supply voltage or ground. The voltage-drop between the buffered voltage and the rail can be as low as 10 mV. Besides, the output impedance can be lower as the proposed buffer entails larger load capacitor.

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来源期刊

2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)

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