{"title":"宽动态范围电流反射镜","authors":"A. Cracan, G. Bonteanu","doi":"10.1109/SMICND.2018.8539765","DOIUrl":null,"url":null,"abstract":"A novel circuit solution for implementing a known low-voltage current mirror topology is presented. It demonstrates a close to the rail input and output voltages (one saturation voltage at the input and two saturation voltages at the output) while being able to support an input current variation of orders of magnitude. The structure uses dynamic biasing in order to keep the transistors in the active region.","PeriodicalId":247062,"journal":{"name":"2018 International Semiconductor Conference (CAS)","volume":"468 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Wide Dynamic Range Current Mirror\",\"authors\":\"A. Cracan, G. Bonteanu\",\"doi\":\"10.1109/SMICND.2018.8539765\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel circuit solution for implementing a known low-voltage current mirror topology is presented. It demonstrates a close to the rail input and output voltages (one saturation voltage at the input and two saturation voltages at the output) while being able to support an input current variation of orders of magnitude. The structure uses dynamic biasing in order to keep the transistors in the active region.\",\"PeriodicalId\":247062,\"journal\":{\"name\":\"2018 International Semiconductor Conference (CAS)\",\"volume\":\"468 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 International Semiconductor Conference (CAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMICND.2018.8539765\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Semiconductor Conference (CAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMICND.2018.8539765","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel circuit solution for implementing a known low-voltage current mirror topology is presented. It demonstrates a close to the rail input and output voltages (one saturation voltage at the input and two saturation voltages at the output) while being able to support an input current variation of orders of magnitude. The structure uses dynamic biasing in order to keep the transistors in the active region.