逻辑电路测试生成的遗传方法

Proceedings of IEEE 3rd Asian Test Symposium (ATS) Pub Date : 1994-11-15 DOI:10.1109/ATS.1994.367246

T. Hayashi, H. Kita, K. Hatayama

{"title":"逻辑电路测试生成的遗传方法","authors":"T. Hayashi, H. Kita, K. Hatayama","doi":"10.1109/ATS.1994.367246","DOIUrl":null,"url":null,"abstract":"This paper presents a genetic algorithm to generate tests for logic circuits. Bit strings corresponding to primary input patterns are evolved into tests for detecting a target fault by genetic operations. Some new techniques, such as a crossover operation based on fault-excitability and fault-drivability, are introduced to achieve high fault coverage. Experimental results show that the genetic approach is effective for solving test generation problem.<<ETX>>","PeriodicalId":182440,"journal":{"name":"Proceedings of IEEE 3rd Asian Test Symposium (ATS)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A genetic approach to test generation for logic circuits\",\"authors\":\"T. Hayashi, H. Kita, K. Hatayama\",\"doi\":\"10.1109/ATS.1994.367246\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a genetic algorithm to generate tests for logic circuits. Bit strings corresponding to primary input patterns are evolved into tests for detecting a target fault by genetic operations. Some new techniques, such as a crossover operation based on fault-excitability and fault-drivability, are introduced to achieve high fault coverage. Experimental results show that the genetic approach is effective for solving test generation problem.<<ETX>>\",\"PeriodicalId\":182440,\"journal\":{\"name\":\"Proceedings of IEEE 3rd Asian Test Symposium (ATS)\",\"volume\":\"87 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-11-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of IEEE 3rd Asian Test Symposium (ATS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.1994.367246\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE 3rd Asian Test Symposium (ATS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.1994.367246","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 8

摘要

本文提出了一种用于逻辑电路测试生成的遗传算法。通过遗传运算，将主输入模式对应的位串演化为检测目标故障的测试。为了实现高故障覆盖率，引入了基于故障可激性和故障可驱动性的交叉操作等新技术。实验结果表明，遗传算法是解决测试生成问题的有效方法。

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A genetic approach to test generation for logic circuits

This paper presents a genetic algorithm to generate tests for logic circuits. Bit strings corresponding to primary input patterns are evolved into tests for detecting a target fault by genetic operations. Some new techniques, such as a crossover operation based on fault-excitability and fault-drivability, are introduced to achieve high fault coverage. Experimental results show that the genetic approach is effective for solving test generation problem.<>

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Proceedings of IEEE 3rd Asian Test Symposium (ATS)

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