{"title":"一种宽频域自参考时钟抖动测量电路","authors":"Chung-Yi Li, Chia-Yuan Chou, Tsin-Yuan Chang","doi":"10.1109/ATS.2006.15","DOIUrl":null,"url":null,"abstract":"In this paper, a jitter measurement circuit with its calibration scheme for measuring peak-to-peak jitters of clock is proposed and demonstrated. By applying the Vernier oscillators, the mismatching effect and area overhead are both reduced compared with conventional circuits using Vernier delay lines. With high resolution (7.98ps) and high speed (20.08ps/5k samples), the proposed circuit develops a tunable frequency range of input clock and improves the accuracy of the measurement results. The proposed circuit may be applied in multi-clocks' measurement","PeriodicalId":242530,"journal":{"name":"2006 15th Asian Test Symposium","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-11-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Self-Referred Clock Jitter Measurement Circuit in Wide Frequency Range\",\"authors\":\"Chung-Yi Li, Chia-Yuan Chou, Tsin-Yuan Chang\",\"doi\":\"10.1109/ATS.2006.15\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a jitter measurement circuit with its calibration scheme for measuring peak-to-peak jitters of clock is proposed and demonstrated. By applying the Vernier oscillators, the mismatching effect and area overhead are both reduced compared with conventional circuits using Vernier delay lines. With high resolution (7.98ps) and high speed (20.08ps/5k samples), the proposed circuit develops a tunable frequency range of input clock and improves the accuracy of the measurement results. The proposed circuit may be applied in multi-clocks' measurement\",\"PeriodicalId\":242530,\"journal\":{\"name\":\"2006 15th Asian Test Symposium\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-11-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 15th Asian Test Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.2006.15\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 15th Asian Test Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2006.15","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Self-Referred Clock Jitter Measurement Circuit in Wide Frequency Range
In this paper, a jitter measurement circuit with its calibration scheme for measuring peak-to-peak jitters of clock is proposed and demonstrated. By applying the Vernier oscillators, the mismatching effect and area overhead are both reduced compared with conventional circuits using Vernier delay lines. With high resolution (7.98ps) and high speed (20.08ps/5k samples), the proposed circuit develops a tunable frequency range of input clock and improves the accuracy of the measurement results. The proposed circuit may be applied in multi-clocks' measurement