{"title":"低功率加权伪随机测试模式生成的发射捕获延迟测试*","authors":"D. Xiang, J. Cai, Bo Liu","doi":"10.1109/VTS48691.2020.9107597","DOIUrl":null,"url":null,"abstract":"A new weighted pseudo-random test generator called wPRPG is proposed for low-power launch-on-capture (LOC) transition delay fault testing. The low-power weighted PRPG is implemented by assigning different weights on the test enable signals and applying a gating technique. The new low-power PRPG can achieve much higher transition delay fault coverage in LOC delay testing than the conventional test-per-scan PRPG.","PeriodicalId":326132,"journal":{"name":"2020 IEEE 38th VLSI Test Symposium (VTS)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Low-Power Weighted Pseudo-Random Test Pattern Generation for Launch-on-Capture Delay Testing*\",\"authors\":\"D. Xiang, J. Cai, Bo Liu\",\"doi\":\"10.1109/VTS48691.2020.9107597\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new weighted pseudo-random test generator called wPRPG is proposed for low-power launch-on-capture (LOC) transition delay fault testing. The low-power weighted PRPG is implemented by assigning different weights on the test enable signals and applying a gating technique. The new low-power PRPG can achieve much higher transition delay fault coverage in LOC delay testing than the conventional test-per-scan PRPG.\",\"PeriodicalId\":326132,\"journal\":{\"name\":\"2020 IEEE 38th VLSI Test Symposium (VTS)\",\"volume\":\"66 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 38th VLSI Test Symposium (VTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTS48691.2020.9107597\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 38th VLSI Test Symposium (VTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTS48691.2020.9107597","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low-Power Weighted Pseudo-Random Test Pattern Generation for Launch-on-Capture Delay Testing*
A new weighted pseudo-random test generator called wPRPG is proposed for low-power launch-on-capture (LOC) transition delay fault testing. The low-power weighted PRPG is implemented by assigning different weights on the test enable signals and applying a gating technique. The new low-power PRPG can achieve much higher transition delay fault coverage in LOC delay testing than the conventional test-per-scan PRPG.