M. Muhammad, R. Gauthier, K. Chatty, Junjun Li, C. Seguin
{"title":"先进CMOS技术中带有ESD保护器件的I/O失效分析","authors":"M. Muhammad, R. Gauthier, K. Chatty, Junjun Li, C. Seguin","doi":"10.1109/IPFA.2007.4378100","DOIUrl":null,"url":null,"abstract":"Many types of ESD protection devices such as diodes, NFETs, SCRs and RC-triggered power clamps having different failure mechanisms are used in advanced CMOS technologies. Circuit schematic analysis and SEM failure analysis are utilized to clearly predict and identify the failing I/O driver/receiver devices and/or the various ESD protection devices during an ESD event.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"152 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Failure Analysis of I/O with ESD Protection Devices in Advanced CMOS Technologies\",\"authors\":\"M. Muhammad, R. Gauthier, K. Chatty, Junjun Li, C. Seguin\",\"doi\":\"10.1109/IPFA.2007.4378100\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Many types of ESD protection devices such as diodes, NFETs, SCRs and RC-triggered power clamps having different failure mechanisms are used in advanced CMOS technologies. Circuit schematic analysis and SEM failure analysis are utilized to clearly predict and identify the failing I/O driver/receiver devices and/or the various ESD protection devices during an ESD event.\",\"PeriodicalId\":334987,\"journal\":{\"name\":\"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits\",\"volume\":\"152 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-07-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2007.4378100\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2007.4378100","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Failure Analysis of I/O with ESD Protection Devices in Advanced CMOS Technologies
Many types of ESD protection devices such as diodes, NFETs, SCRs and RC-triggered power clamps having different failure mechanisms are used in advanced CMOS technologies. Circuit schematic analysis and SEM failure analysis are utilized to clearly predict and identify the failing I/O driver/receiver devices and/or the various ESD protection devices during an ESD event.