基于SOI技术的高压带隙参考设计

Proceedings of the 15th Biennial University/Government/ Industry Microelectronics Symposium (Cat. No.03CH37488) Pub Date : 2003-09-04 DOI:10.1109/UGIM.2003.1225710

V. Sukumar, S. Subramanium, D. Pan, K. Buck, H. Hess, H.W. Li, D. Cox, M. Mojarradi

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引用次数: 8

摘要

采用SOI CMOS技术设计并实现了一种高电压带隙参考电路。该设计能够在0/spl°C到100/spl°C的温度范围内保持稳定的值。该设计还针对工艺和电源波动进行了验证。一种创新的方法取代了传统的横向pnp晶体管方法。

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High voltage bandgap reference design using SOI technology

A high voltage bandgap reference circuit has been designed and implemented in an SOI CMOS technology. The design is capable of maintaining a stable value, in the temperature range from 0/spl deg/C to 100/spl deg/C. The design is also validated against process and power supply fluctuations. An innovative approach replaces the traditional lateral pnp transistor method.

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Proceedings of the 15th Biennial University/Government/ Industry Microelectronics Symposium (Cat. No.03CH37488)

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