{"title":"IDDQ逻辑漏电的逻辑电路分析及TEM检测","authors":"Ang Chung Keow, Yong Foo Khong","doi":"10.1109/IPFA.2016.7564279","DOIUrl":null,"url":null,"abstract":"The decreasing of technology node has made process of failure analysis become difficult. This paper outlines electrical fault localization method on IDDQ logic leakage failure. Upon fault localization, a complete analysis through TEM was performed for identification and further understanding of the failure mechanism eventually led to root cause finding.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Logic circuit analysis and TEM inspection of IDDQ logic leakage\",\"authors\":\"Ang Chung Keow, Yong Foo Khong\",\"doi\":\"10.1109/IPFA.2016.7564279\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The decreasing of technology node has made process of failure analysis become difficult. This paper outlines electrical fault localization method on IDDQ logic leakage failure. Upon fault localization, a complete analysis through TEM was performed for identification and further understanding of the failure mechanism eventually led to root cause finding.\",\"PeriodicalId\":206237,\"journal\":{\"name\":\"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"volume\":\"62 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-07-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2016.7564279\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2016.7564279","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Logic circuit analysis and TEM inspection of IDDQ logic leakage
The decreasing of technology node has made process of failure analysis become difficult. This paper outlines electrical fault localization method on IDDQ logic leakage failure. Upon fault localization, a complete analysis through TEM was performed for identification and further understanding of the failure mechanism eventually led to root cause finding.