{"title":"树形进位加法器的形式化验证","authors":"Sae Hwan Kim, Shiu-Kai Chin","doi":"10.1109/GLSV.1999.757419","DOIUrl":null,"url":null,"abstract":"Quad trees-trees with four branches, are used to abstractly describe tree-structured carry-lookahead adders using 4-bit components. The specification and implementation descriptions are parametrized and tree-structured adders having arbitrarily large inputs and outputs are described. The descriptions are formally verified using the HOL theorem power.","PeriodicalId":127222,"journal":{"name":"Proceedings Ninth Great Lakes Symposium on VLSI","volume":"233 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Formal verification of tree-structured carry-lookahead adders\",\"authors\":\"Sae Hwan Kim, Shiu-Kai Chin\",\"doi\":\"10.1109/GLSV.1999.757419\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Quad trees-trees with four branches, are used to abstractly describe tree-structured carry-lookahead adders using 4-bit components. The specification and implementation descriptions are parametrized and tree-structured adders having arbitrarily large inputs and outputs are described. The descriptions are formally verified using the HOL theorem power.\",\"PeriodicalId\":127222,\"journal\":{\"name\":\"Proceedings Ninth Great Lakes Symposium on VLSI\",\"volume\":\"233 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-03-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Ninth Great Lakes Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GLSV.1999.757419\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Ninth Great Lakes Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GLSV.1999.757419","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Formal verification of tree-structured carry-lookahead adders
Quad trees-trees with four branches, are used to abstractly describe tree-structured carry-lookahead adders using 4-bit components. The specification and implementation descriptions are parametrized and tree-structured adders having arbitrarily large inputs and outputs are described. The descriptions are formally verified using the HOL theorem power.