Proceedings Ninth Great Lakes Symposium on VLSI

Formal verification of tree-structured carry-lookahead adders

Pub Date : 1999-03-04 DOI: 10.1109/GLSV.1999.757419 Sae Hwan Kim, Shiu-Kai Chin

Methodology of logic synthesis for implementation using heterogeneous LUT FPGAs

Pub Date : 1999-03-04 DOI: 10.1109/GLSV.1999.757424 I. Lemberski

Congestion mitigation during placement

Pub Date : 1999-03-04 DOI: 10.1109/GLSV.1999.757417 K. Chakraborty, Natesan Venkateswaran