{"title":"微处理器设计验证的精确分析","authors":"Haihua Shen, Heng Zhang","doi":"10.1109/ATS.2007.95","DOIUrl":null,"url":null,"abstract":"Comparing with the passion for verification technical innovations, the practical verification experiences especially the bug reports and analyses rarely appear in public research. It is very important to analyze the practical bug reports for feedback on the future verification. Thanks to the sufficient design scale of our microprocessor and efficient verification environment we developed, we are able to present in this paper an extensive analysis of the effects of bugs on different design stages and different microarchitectures. The analysis approaches and results are valuable for estimating the distribution of bugs in a microprocessor design and preventing the project from verification bottlenecks.","PeriodicalId":289969,"journal":{"name":"16th Asian Test Symposium (ATS 2007)","volume":"311 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An Accurate Analysis of Microprocessor Design Verification\",\"authors\":\"Haihua Shen, Heng Zhang\",\"doi\":\"10.1109/ATS.2007.95\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Comparing with the passion for verification technical innovations, the practical verification experiences especially the bug reports and analyses rarely appear in public research. It is very important to analyze the practical bug reports for feedback on the future verification. Thanks to the sufficient design scale of our microprocessor and efficient verification environment we developed, we are able to present in this paper an extensive analysis of the effects of bugs on different design stages and different microarchitectures. The analysis approaches and results are valuable for estimating the distribution of bugs in a microprocessor design and preventing the project from verification bottlenecks.\",\"PeriodicalId\":289969,\"journal\":{\"name\":\"16th Asian Test Symposium (ATS 2007)\",\"volume\":\"311 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-10-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"16th Asian Test Symposium (ATS 2007)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.2007.95\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"16th Asian Test Symposium (ATS 2007)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2007.95","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An Accurate Analysis of Microprocessor Design Verification
Comparing with the passion for verification technical innovations, the practical verification experiences especially the bug reports and analyses rarely appear in public research. It is very important to analyze the practical bug reports for feedback on the future verification. Thanks to the sufficient design scale of our microprocessor and efficient verification environment we developed, we are able to present in this paper an extensive analysis of the effects of bugs on different design stages and different microarchitectures. The analysis approaches and results are valuable for estimating the distribution of bugs in a microprocessor design and preventing the project from verification bottlenecks.
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