Device breakdown optimization of AhOs/GaN MISFETs

In this paper we demonstrate a solution to achieve robust enhancement-mode Al2O3/GaN MISFETs with a high breakdown voltage and suggest a possible model for the device off-state breakdown. It is found that the device breakdown exhibits different gate voltage dependence for different surface treatments before the gate dielectric deposition. The device performance is greatly improved by using an in-situ surface plasma treatment. The improved device performance is explained by a reduction of traps at the Al2O3/GaN interface, which finally leads to a reduction in the amount of trapped positive charges and associated with that a reduction of the effective electric field across the gate dielectric when the device is in off-state. Several experimental results support this hypothesis: (1) The recoverable negative threshold voltage shift after reverse gate bias depends on the interface clean before gate dielectric deposition, (2) The reverse bias gate dielectric breakdown voltage is improved by this interface plasma treatment, although the forward bias gate dielectric breakdown voltage is identical.