传输线脉冲试验方法、试验技术及低电容电压抑制装置对系统级静电放电的符合性

K. Shrier, T. Truong, J. Felps
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引用次数: 12

摘要

在电子系统中需要电压抑制装置,以防止电气过应力(EOS)和静电放电(ESD)事件对电气元件的损坏。采用多种测试技术,结合传输线脉冲(TLP)测试系统、直接放电HBM和系统级ESD枪,对低电容聚合物电压抑制器(PVS)进行了评估。此外,还将展示集成用于手机GaAs射频(RF)开关和千兆以太网服务器半导体的系统级ESD保护的PVS器件的测试方法。我们的工作表明,需要集成器件级和系统级测试方法,以实现组件ESD生存能力和系统级ESD关注点之间的相关性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Transmission line pulse test methods, test techniques and characterization of low capacitance voltage suppression device for system level electrostatic discharge compliance
Voltage suppression devices are needed in electronic systems to prevent damage to electrical components from electrical overstress (EOS) and electrostatic discharge (ESD) events. A low capacitance, polymer voltage-suppressor (PVS) device is evaluated using various testing techniques that combine transmission line pulse (TLP) test system, direct discharge HBM, and a system-level ESD gun. Additionally, test methods for integrating PVS devices for system-level ESD protection of cell phone GaAs radio frequency (RF) switches and Gigabit Ethernet server semiconductors will be shown. Our work demonstrates the need for integration of device-level and system-level test methodologies for correlation between component ESD survivability and system-level ESD concerns.
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