Y.S. Chu, Y.H. Wang, C. Wang, Y. Lee, A. Kang, R. Ranjan, W. Chu, T. Ong, H. W. Chin, K. Wu
{"title":"用于汽车嵌入式应用的分门快闪存储器","authors":"Y.S. Chu, Y.H. Wang, C. Wang, Y. Lee, A. Kang, R. Ranjan, W. Chu, T. Ong, H. W. Chin, K. Wu","doi":"10.1109/IRPS.2011.5784547","DOIUrl":null,"url":null,"abstract":"An embedded split-gate flash memory based on 65nm logic process technology has been developed. The design rules for split-gate flash macro's testability and reliability are discussed. An automotive grade flash memory with 100K endurance, 10 years, 125°C data retention, and 1-ppm requirement has been demonstrated with a comprehensive dielectric screen methodology. Both erase time push out and data retention dominant mechanisms are thoroughly studied with intrinsic lifetime and large sample certification. An automotive embedded split-gate flash solution in 65nm technology is ready for commercialization.","PeriodicalId":242672,"journal":{"name":"2011 International Reliability Physics Symposium","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Split-gate flash memory for automotive embedded applications\",\"authors\":\"Y.S. Chu, Y.H. Wang, C. Wang, Y. Lee, A. Kang, R. Ranjan, W. Chu, T. Ong, H. W. Chin, K. Wu\",\"doi\":\"10.1109/IRPS.2011.5784547\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An embedded split-gate flash memory based on 65nm logic process technology has been developed. The design rules for split-gate flash macro's testability and reliability are discussed. An automotive grade flash memory with 100K endurance, 10 years, 125°C data retention, and 1-ppm requirement has been demonstrated with a comprehensive dielectric screen methodology. Both erase time push out and data retention dominant mechanisms are thoroughly studied with intrinsic lifetime and large sample certification. An automotive embedded split-gate flash solution in 65nm technology is ready for commercialization.\",\"PeriodicalId\":242672,\"journal\":{\"name\":\"2011 International Reliability Physics Symposium\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-04-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 International Reliability Physics Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRPS.2011.5784547\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 International Reliability Physics Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRPS.2011.5784547","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Split-gate flash memory for automotive embedded applications
An embedded split-gate flash memory based on 65nm logic process technology has been developed. The design rules for split-gate flash macro's testability and reliability are discussed. An automotive grade flash memory with 100K endurance, 10 years, 125°C data retention, and 1-ppm requirement has been demonstrated with a comprehensive dielectric screen methodology. Both erase time push out and data retention dominant mechanisms are thoroughly studied with intrinsic lifetime and large sample certification. An automotive embedded split-gate flash solution in 65nm technology is ready for commercialization.