用于ESD网络设计的FDSOI门控二极管的ESD稳健性:薄盒还是厚盒?

2010 IEEE International SOI Conference (SOI) Pub Date : 2010-11-18 DOI:10.1109/SOI.2010.5641372

T. Benoist, C. Fenouillet-Béranger, P. Perreau, C. Buj, P. Galy, D. Marin-Cudraz, O. Faynot, S. Cristoloveanu, P. Gentil

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引用次数: 12

摘要

采用CMOS 45nm FDSOI技术制备的门控二极管，在10nm和145nm埋氧化物(BOX)厚度下，对静电放电(ESD)事件的稳健性进行了比较。结果表明，由于更好的散热，薄盒上协同设计器件的性能得到了改善:鲁棒性增益为1.6。

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ESD robustness of FDSOI gated diode for ESD network design: Thin or thick BOX?

The robustness against Electrostatic Discharge (ESD) events of gated diodes, fabricated in CMOS 45nm FDSOI technology, is compared for 10nm and 145nm Buried Oxide (BOX) thickness. It is shown that the performance of devices for co-design on thin BOX is improved thanks to a better thermal dissipation: A gain of 1.6 on the robustness was found.

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2010 IEEE International SOI Conference (SOI)

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