Sumio Sugisaki, Ryohei Morita, Yuki Yamaguchi, T. Matsuda, M. Kimura
{"title":"利用多晶硅薄膜晶体管的人工神经网络","authors":"Sumio Sugisaki, Ryohei Morita, Yuki Yamaguchi, T. Matsuda, M. Kimura","doi":"10.1109/IMFEDK.2016.7521689","DOIUrl":null,"url":null,"abstract":"We are developing neural networks using thin-film transistors (TFTs). By adopting an interconnect-type neural network and utilizing a characteristic degradation of poly-Si TFTs as a variable strength of synapse connection, which was originally an issue, we realized the neuron consisting of eight TFTs and synapse of only one TFT. Particularly in this presentation, we confirmed that the learning efficiency can be improved by gradually increasing the control voltage. This is a result leading to a robust and tolerant system in real situation.","PeriodicalId":293371,"journal":{"name":"2016 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Artificial neural networks using poly-Si thin-film transistors\",\"authors\":\"Sumio Sugisaki, Ryohei Morita, Yuki Yamaguchi, T. Matsuda, M. Kimura\",\"doi\":\"10.1109/IMFEDK.2016.7521689\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We are developing neural networks using thin-film transistors (TFTs). By adopting an interconnect-type neural network and utilizing a characteristic degradation of poly-Si TFTs as a variable strength of synapse connection, which was originally an issue, we realized the neuron consisting of eight TFTs and synapse of only one TFT. Particularly in this presentation, we confirmed that the learning efficiency can be improved by gradually increasing the control voltage. This is a result leading to a robust and tolerant system in real situation.\",\"PeriodicalId\":293371,\"journal\":{\"name\":\"2016 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMFEDK.2016.7521689\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMFEDK.2016.7521689","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Artificial neural networks using poly-Si thin-film transistors
We are developing neural networks using thin-film transistors (TFTs). By adopting an interconnect-type neural network and utilizing a characteristic degradation of poly-Si TFTs as a variable strength of synapse connection, which was originally an issue, we realized the neuron consisting of eight TFTs and synapse of only one TFT. Particularly in this presentation, we confirmed that the learning efficiency can be improved by gradually increasing the control voltage. This is a result leading to a robust and tolerant system in real situation.