{"title":"超大规模集成电路芯片中的缺陷尺寸分布","authors":"R. Glang","doi":"10.1109/ICMTS.1990.67880","DOIUrl":null,"url":null,"abstract":"VLSI patterns consisting of parallel lines of polysilicon with different spacings have been electrically tested. The number of observed shorts was found to be related to the line spacings by using an analytical model for the defect sensitive pattern areas. The distribution of defect sizes in the range from 0.5 to 1.4 mu m is proportional to x/sup -3/. The exponent value agrees with earlier distribution studies concerning defects several micrometers in size.<<ETX>>","PeriodicalId":196449,"journal":{"name":"International Conference on Microelectronic Test Structures","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-03-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"46","resultStr":"{\"title\":\"Defect size distribution in VLSI chips\",\"authors\":\"R. Glang\",\"doi\":\"10.1109/ICMTS.1990.67880\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"VLSI patterns consisting of parallel lines of polysilicon with different spacings have been electrically tested. The number of observed shorts was found to be related to the line spacings by using an analytical model for the defect sensitive pattern areas. The distribution of defect sizes in the range from 0.5 to 1.4 mu m is proportional to x/sup -3/. The exponent value agrees with earlier distribution studies concerning defects several micrometers in size.<<ETX>>\",\"PeriodicalId\":196449,\"journal\":{\"name\":\"International Conference on Microelectronic Test Structures\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-03-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"46\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conference on Microelectronic Test Structures\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMTS.1990.67880\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Microelectronic Test Structures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.1990.67880","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
VLSI patterns consisting of parallel lines of polysilicon with different spacings have been electrically tested. The number of observed shorts was found to be related to the line spacings by using an analytical model for the defect sensitive pattern areas. The distribution of defect sizes in the range from 0.5 to 1.4 mu m is proportional to x/sup -3/. The exponent value agrees with earlier distribution studies concerning defects several micrometers in size.<>
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