{"title":"改进IBM ES/9370系统可测试性的技术","authors":"R. Lusch, Endre F. Sarkany","doi":"10.1109/TEST.1989.82310","DOIUrl":null,"url":null,"abstract":"The authors discuss three techniques used in the IBM ES/9370 series of processors to improve the testability, and hence the quality levels, of card assemblies. First they investigate the testing requirements and challenges presented by a nonvolatile static RAM and how they were met. Then they introduce a method which uses flush-through logic to provide improved access to array components. Next, the authors discuss how a compare circuit can be used to reduce I/O (input/output) requirements when testing an array. These algorithms were successfully implemented using programming Language for Testing (PLT). Background information and a detailed methodology for each of the techniques are provided.<<ETX>>","PeriodicalId":264111,"journal":{"name":"Proceedings. 'Meeting the Tests of Time'., International Test Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Techniques for improved testability in the IBM ES/9370 system\",\"authors\":\"R. Lusch, Endre F. Sarkany\",\"doi\":\"10.1109/TEST.1989.82310\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors discuss three techniques used in the IBM ES/9370 series of processors to improve the testability, and hence the quality levels, of card assemblies. First they investigate the testing requirements and challenges presented by a nonvolatile static RAM and how they were met. Then they introduce a method which uses flush-through logic to provide improved access to array components. Next, the authors discuss how a compare circuit can be used to reduce I/O (input/output) requirements when testing an array. These algorithms were successfully implemented using programming Language for Testing (PLT). Background information and a detailed methodology for each of the techniques are provided.<<ETX>>\",\"PeriodicalId\":264111,\"journal\":{\"name\":\"Proceedings. 'Meeting the Tests of Time'., International Test Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-08-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. 'Meeting the Tests of Time'., International Test Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TEST.1989.82310\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 'Meeting the Tests of Time'., International Test Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEST.1989.82310","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Techniques for improved testability in the IBM ES/9370 system
The authors discuss three techniques used in the IBM ES/9370 series of processors to improve the testability, and hence the quality levels, of card assemblies. First they investigate the testing requirements and challenges presented by a nonvolatile static RAM and how they were met. Then they introduce a method which uses flush-through logic to provide improved access to array components. Next, the authors discuss how a compare circuit can be used to reduce I/O (input/output) requirements when testing an array. These algorithms were successfully implemented using programming Language for Testing (PLT). Background information and a detailed methodology for each of the techniques are provided.<>