Industry/unilversity Collaboration To Design Portable Layout Generators

This article presents a case study of a cooperation between a company and university in the framework of the EEC IDPS project, from the point of view of the university. This project aims at providutg a `Common Library' of cells and macro-blocks for VLSI design available from all partners. An agreed level of portability rrum be defined to ensure sharing of the library by all the partners. A methodology oriented toward generator portability at the layout level has been defined, The layout p[acement uses a tiler and leaf cell approach to achieve high densities and performances. Software portability Measured by the use of the general purpose C language as tiling language. Process independence is warranted by the use of a fixed grid symbolic layout methodology, for leaf cell design. Six CMOS generators have been successfully designed following this methodology.