{"title":"基于物理气相沉积(PVD)的MEMS真空晶圆级封装(WLE)","authors":"B. Soon, Navab Singh, J. Tsai, Chengkuo Lee","doi":"10.1109/EPTC.2012.6507104","DOIUrl":null,"url":null,"abstract":"In this paper, we demonstrate wafer level encapsulation of MEMS using physical vapor deposition of aluminum (Al). A cavity area, which simulates the area of a MEMS device, is fully encapsulated by dual layer of amorphous silicon and Al. The encapsulation process takes place in the PVD chamber, thus the vacuum level in the sealed cavity is assumed to be high. The proposed processes are entirely CMOS compatible and readily deployed into any standard CMOS foundry and semiconductor wafer fabrication.","PeriodicalId":431312,"journal":{"name":"2012 IEEE 14th Electronics Packaging Technology Conference (EPTC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Vacuum based wafer level encapsulation (WLE) of MEMS using physical vapor deposition (PVD)\",\"authors\":\"B. Soon, Navab Singh, J. Tsai, Chengkuo Lee\",\"doi\":\"10.1109/EPTC.2012.6507104\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we demonstrate wafer level encapsulation of MEMS using physical vapor deposition of aluminum (Al). A cavity area, which simulates the area of a MEMS device, is fully encapsulated by dual layer of amorphous silicon and Al. The encapsulation process takes place in the PVD chamber, thus the vacuum level in the sealed cavity is assumed to be high. The proposed processes are entirely CMOS compatible and readily deployed into any standard CMOS foundry and semiconductor wafer fabrication.\",\"PeriodicalId\":431312,\"journal\":{\"name\":\"2012 IEEE 14th Electronics Packaging Technology Conference (EPTC)\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE 14th Electronics Packaging Technology Conference (EPTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPTC.2012.6507104\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 14th Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC.2012.6507104","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Vacuum based wafer level encapsulation (WLE) of MEMS using physical vapor deposition (PVD)
In this paper, we demonstrate wafer level encapsulation of MEMS using physical vapor deposition of aluminum (Al). A cavity area, which simulates the area of a MEMS device, is fully encapsulated by dual layer of amorphous silicon and Al. The encapsulation process takes place in the PVD chamber, thus the vacuum level in the sealed cavity is assumed to be high. The proposed processes are entirely CMOS compatible and readily deployed into any standard CMOS foundry and semiconductor wafer fabrication.