N. Prokopenko, M. Gourary, S. Rusakov, S. Ulyanov, M. Zharov, E. M. Savchenko
{"title":"基于双输入级的高速CMOS运算放大器参数优化","authors":"N. Prokopenko, M. Gourary, S. Rusakov, S. Ulyanov, M. Zharov, E. M. Savchenko","doi":"10.1109/EWDTS.2017.8110144","DOIUrl":null,"url":null,"abstract":"The parameter optimization features of CMOS operational amplifiers (OA) based on dual-input-stage under constraints on power consumption, unity gain frequency, phase margin, open loop gain and compensation capacitance are considered. It is shown that the maximum slew rate of the output voltage is proportional to the DC currents of dual-input-stage due to the usage of current mirror based push-pull parallel channels. The recommendations to design of high-speed CMOS OA with wide range of dynamic characteristics are given.","PeriodicalId":141333,"journal":{"name":"2017 IEEE East-West Design & Test Symposium (EWDTS)","volume":"27 22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Parameter optimization of high-speed CMOS operational amplifiers based on dual-input stage\",\"authors\":\"N. Prokopenko, M. Gourary, S. Rusakov, S. Ulyanov, M. Zharov, E. M. Savchenko\",\"doi\":\"10.1109/EWDTS.2017.8110144\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The parameter optimization features of CMOS operational amplifiers (OA) based on dual-input-stage under constraints on power consumption, unity gain frequency, phase margin, open loop gain and compensation capacitance are considered. It is shown that the maximum slew rate of the output voltage is proportional to the DC currents of dual-input-stage due to the usage of current mirror based push-pull parallel channels. The recommendations to design of high-speed CMOS OA with wide range of dynamic characteristics are given.\",\"PeriodicalId\":141333,\"journal\":{\"name\":\"2017 IEEE East-West Design & Test Symposium (EWDTS)\",\"volume\":\"27 22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE East-West Design & Test Symposium (EWDTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EWDTS.2017.8110144\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE East-West Design & Test Symposium (EWDTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EWDTS.2017.8110144","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Parameter optimization of high-speed CMOS operational amplifiers based on dual-input stage
The parameter optimization features of CMOS operational amplifiers (OA) based on dual-input-stage under constraints on power consumption, unity gain frequency, phase margin, open loop gain and compensation capacitance are considered. It is shown that the maximum slew rate of the output voltage is proportional to the DC currents of dual-input-stage due to the usage of current mirror based push-pull parallel channels. The recommendations to design of high-speed CMOS OA with wide range of dynamic characteristics are given.