极低功耗c轴对准晶体In-Ga-Zn-O 60纳米晶体管集成工业65纳米Si MOSFET，用于物联网正常关闭CPU应用

2016 IEEE Symposium on VLSI Technology Pub Date : 2016-06-14 DOI:10.1109/VLSIT.2016.7573378

Shao Hui Wu, X. Y. Jia, Mei Kui, C. Shuai, Tien-Yu Hsieh, H. Lin, Derek Chen, Chen Bin Lin, J. Y. Wu, T. Yew, Yuta Endo, K. Kato, S. Yamazaki

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引用次数: 13

摘要

首次将实验室60 nm c轴定向晶体In-Ga-Zn-O (CAAC-IGZO)氧化物半导体场效应管(OSFET)与工业65 nm Si MOSFET (SiFET)成功集成。通过这种混合工艺，制备了极低的断态泄漏水平~zA (1×10-21A)的OSFET，而传统的Si器件只能达到1×10-12A泄漏水平。对于IoT(物联网)应用，这种混合工艺制造的正常关闭CPU (Noff CPU)实现了86%的功耗降低。混合工艺可以扩展到其他应用，如eDRAM，图像传感器和FPGA。

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Extremely low power c-axis aligned crystalline In-Ga-Zn-O 60 nm transistor integrated with industry 65 nm Si MOSFET for IoT normally-off CPU application

For the first time, laboratory 60 nm c-axis aligned crystalline In-Ga-Zn-O (CAAC-IGZO) oxide semiconductor FET (OSFET) was successfully integrated with industrial 65 nm Si MOSFET (SiFET). By this hybrid process, OSFET with extremely low off-state leakage level ~zA (1×10-21A) was fabricated, while traditional Si device can only reach 1×10-12A leakage level. For IoT (Internet of Things) applications, normally-off CPU (Noff CPU) fabricated by this hybrid process achieved 86% reduction of power consumption. The hybrid process can be extended to other applications like eDRAM, image sensor and FPGA.

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2016 IEEE Symposium on VLSI Technology

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