{"title":"多层互连的氢阻塞效应对金属化后退火的限制","authors":"S. Ito, K. Noguchi, T. Horiuchi, J. Clemens","doi":"10.1109/VLSIT.1998.689249","DOIUrl":null,"url":null,"abstract":"We investigated a hydrogen blocking effect: prevention of hydrogen diffusion during post-metallization anneal by a metal interconnect situated above the MOSFET, resulting in the degradation of device characteristics. We clarified the impact of this effect on the devices having multilevel interconnects, based on a model that considers hydrogen's behaviour in a device. To eliminate this effect, we propose optimization of multilevel interconnect layout to minimize the diffusion path of hydrogen. The benefit of implanting hydrogen ions in the back-end process is also demonstrated as a process solution.","PeriodicalId":402365,"journal":{"name":"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Limitation of post-metallization annealing due to hydrogen blocking effect of multilevel interconnect\",\"authors\":\"S. Ito, K. Noguchi, T. Horiuchi, J. Clemens\",\"doi\":\"10.1109/VLSIT.1998.689249\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We investigated a hydrogen blocking effect: prevention of hydrogen diffusion during post-metallization anneal by a metal interconnect situated above the MOSFET, resulting in the degradation of device characteristics. We clarified the impact of this effect on the devices having multilevel interconnects, based on a model that considers hydrogen's behaviour in a device. To eliminate this effect, we propose optimization of multilevel interconnect layout to minimize the diffusion path of hydrogen. The benefit of implanting hydrogen ions in the back-end process is also demonstrated as a process solution.\",\"PeriodicalId\":402365,\"journal\":{\"name\":\"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-06-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.1998.689249\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1998.689249","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Limitation of post-metallization annealing due to hydrogen blocking effect of multilevel interconnect
We investigated a hydrogen blocking effect: prevention of hydrogen diffusion during post-metallization anneal by a metal interconnect situated above the MOSFET, resulting in the degradation of device characteristics. We clarified the impact of this effect on the devices having multilevel interconnects, based on a model that considers hydrogen's behaviour in a device. To eliminate this effect, we propose optimization of multilevel interconnect layout to minimize the diffusion path of hydrogen. The benefit of implanting hydrogen ions in the back-end process is also demonstrated as a process solution.