{"title":"减少带间和带间隧道渗漏的排水结构设计","authors":"T. Hori","doi":"10.1109/VLSIT.1990.111012","DOIUrl":null,"url":null,"abstract":"The author investigates and models gate-induced drain leakage (GIDL) effects over a wide variety of drain structures, including <e1>n </e1><sup>+</sup>-As/<e1>n</e1><sup>-</sup>-P combinations, <e1>n</e1> <sup>-</sup> implant doses (<e1>N</e1><sub>n-</sub>), and spacer lengths (L<sub>s</sub>). An analytical model taking account of nm-order As doping modulation is proposed to explain the enhanced GIDL for <e1>n</e1><sup>+</sup>-As FETs and the suppressed B-B tunneling with increasing <e1>N</e1><sub>n-</sub> for large-tilt-angle implanted-drain devices. Band-to-defect tunneling via interface states is also simulated and found to limit device performance, as well as hot-carrier reliability, much more severely than B-B tunneling. Based on the above understanding, drain-structure design is discussed in view of both performance and reliability","PeriodicalId":441541,"journal":{"name":"Digest of Technical Papers.1990 Symposium on VLSI Technology","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"38","resultStr":"{\"title\":\"Drain-structure design for reduced band-to-band and band-to-defect tunneling leakage\",\"authors\":\"T. Hori\",\"doi\":\"10.1109/VLSIT.1990.111012\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The author investigates and models gate-induced drain leakage (GIDL) effects over a wide variety of drain structures, including <e1>n </e1><sup>+</sup>-As/<e1>n</e1><sup>-</sup>-P combinations, <e1>n</e1> <sup>-</sup> implant doses (<e1>N</e1><sub>n-</sub>), and spacer lengths (L<sub>s</sub>). An analytical model taking account of nm-order As doping modulation is proposed to explain the enhanced GIDL for <e1>n</e1><sup>+</sup>-As FETs and the suppressed B-B tunneling with increasing <e1>N</e1><sub>n-</sub> for large-tilt-angle implanted-drain devices. Band-to-defect tunneling via interface states is also simulated and found to limit device performance, as well as hot-carrier reliability, much more severely than B-B tunneling. Based on the above understanding, drain-structure design is discussed in view of both performance and reliability\",\"PeriodicalId\":441541,\"journal\":{\"name\":\"Digest of Technical Papers.1990 Symposium on VLSI Technology\",\"volume\":\"55 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-06-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"38\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Digest of Technical Papers.1990 Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.1990.111012\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Technical Papers.1990 Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1990.111012","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 38
摘要
作者研究和模拟了各种各样的漏极结构,包括n +- as /n- P组合,n-植入剂量(Nn-)和间隔长度(Ls)的闸致漏极(GIDL)效应。提出了一个考虑纳米级As掺杂调制的解析模型来解释n+-As场效应管的GIDL增强和大倾角植入漏极器件的B-B隧穿随着n-的增加而受到抑制。通过接口状态的带到缺陷隧道也进行了模拟,发现比B-B隧道更严重地限制了器件性能和热载流子可靠性。在此基础上,从性能和可靠性两方面探讨了排水结构的设计
Drain-structure design for reduced band-to-band and band-to-defect tunneling leakage
The author investigates and models gate-induced drain leakage (GIDL) effects over a wide variety of drain structures, including n +-As/n--P combinations, n- implant doses (Nn-), and spacer lengths (Ls). An analytical model taking account of nm-order As doping modulation is proposed to explain the enhanced GIDL for n+-As FETs and the suppressed B-B tunneling with increasing Nn- for large-tilt-angle implanted-drain devices. Band-to-defect tunneling via interface states is also simulated and found to limit device performance, as well as hot-carrier reliability, much more severely than B-B tunneling. Based on the above understanding, drain-structure design is discussed in view of both performance and reliability