{"title":"对差分功率分析的阻力评估:设计人员的执行时间优化","authors":"G. D. Natale, M. Flottes, B. Rouzeyre","doi":"10.1109/DELTA.2010.50","DOIUrl":null,"url":null,"abstract":"This paper proposes a novel method intended to accelerate the checking of the robustness of a device against Differential Power Analysis. We propose an algorithm for the automatic selection of shortest short input vector sequence that leads to the secret key breakthrough. We show that the selected sequence remains valid for different designs of the same cryptographic function.","PeriodicalId":421336,"journal":{"name":"2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications","volume":"374 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-01-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for Designers\",\"authors\":\"G. D. Natale, M. Flottes, B. Rouzeyre\",\"doi\":\"10.1109/DELTA.2010.50\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a novel method intended to accelerate the checking of the robustness of a device against Differential Power Analysis. We propose an algorithm for the automatic selection of shortest short input vector sequence that leads to the secret key breakthrough. We show that the selected sequence remains valid for different designs of the same cryptographic function.\",\"PeriodicalId\":421336,\"journal\":{\"name\":\"2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications\",\"volume\":\"374 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-01-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DELTA.2010.50\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DELTA.2010.50","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for Designers
This paper proposes a novel method intended to accelerate the checking of the robustness of a device against Differential Power Analysis. We propose an algorithm for the automatic selection of shortest short input vector sequence that leads to the secret key breakthrough. We show that the selected sequence remains valid for different designs of the same cryptographic function.