D. Park, K. Stein, K. Schruefer, Y. Lee, J. Han, W. Li, H. Yin, C. Pacha, N. Kim, M. Ostermayr, M. Eller, S. Kim, K. Kim, S. Han, K. von Arnim, N. Moumen, M. Hatzistergos, T. Tang, R. Loesing, X. Chen, D. Jaeger, H. Zhuang, J. Chen, W. Yan, T. Kanarsky, M. Chowdhury, J. Haetty, D. Schepis, M. Chudzik, V.-Y. Theon, S. Samavedam, V. Narayanan, M. Sherony, R. Lindsay, A. Steegen, R. Divakaruni, M. Khare
{"title":"高κ/金属栅极低功耗批量技术-标准CMOS逻辑电路,微处理器关键路径副本和45纳米及以上SRAM的性能评估","authors":"D. Park, K. Stein, K. Schruefer, Y. Lee, J. Han, W. Li, H. Yin, C. Pacha, N. Kim, M. Ostermayr, M. Eller, S. Kim, K. Kim, S. Han, K. von Arnim, N. Moumen, M. Hatzistergos, T. Tang, R. Loesing, X. Chen, D. Jaeger, H. Zhuang, J. Chen, W. Yan, T. Kanarsky, M. Chowdhury, J. Haetty, D. Schepis, M. Chudzik, V.-Y. Theon, S. Samavedam, V. Narayanan, M. Sherony, R. Lindsay, A. Steegen, R. Divakaruni, M. Khare","doi":"10.1109/VTSA.2009.5159305","DOIUrl":null,"url":null,"abstract":"This paper presents performance evaluation of high-κ/metal gate (HK/MG) process on an industry standard 45nm low power microprocessor built on bulk substrate. CMOS devices built with HK/MG demonstrate 50% improvement in NFET and 65% improvement in PFET drive current when compared with industry standard 45nm Poly/SiON devices. No additional stress elements were used for this performance gain. The critical path circuits of this low power microprocessor built with HK/MG show dynamic performance gain over 50% at same supply voltage and 36% lower dynamic energy at same performance. Superior SRAM minimum operating voltage characteristics are achieved due to Vt variability reduction from HK/MG. Analog circuit functionality is demonstrated by a fully integrated PLL circuitry without any modification to process.","PeriodicalId":309622,"journal":{"name":"2009 International Symposium on VLSI Technology, Systems, and Applications","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2009-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"High-κ/metal gate low power bulk technology - Performance evaluation of standard CMOS logic circuits, microprocessor critical path replicas, and SRAM for 45nm and beyond\",\"authors\":\"D. Park, K. Stein, K. Schruefer, Y. Lee, J. Han, W. Li, H. Yin, C. Pacha, N. Kim, M. Ostermayr, M. Eller, S. Kim, K. Kim, S. Han, K. von Arnim, N. Moumen, M. Hatzistergos, T. Tang, R. Loesing, X. Chen, D. Jaeger, H. Zhuang, J. Chen, W. Yan, T. Kanarsky, M. Chowdhury, J. Haetty, D. Schepis, M. Chudzik, V.-Y. Theon, S. Samavedam, V. Narayanan, M. Sherony, R. Lindsay, A. Steegen, R. Divakaruni, M. Khare\",\"doi\":\"10.1109/VTSA.2009.5159305\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents performance evaluation of high-κ/metal gate (HK/MG) process on an industry standard 45nm low power microprocessor built on bulk substrate. CMOS devices built with HK/MG demonstrate 50% improvement in NFET and 65% improvement in PFET drive current when compared with industry standard 45nm Poly/SiON devices. No additional stress elements were used for this performance gain. The critical path circuits of this low power microprocessor built with HK/MG show dynamic performance gain over 50% at same supply voltage and 36% lower dynamic energy at same performance. Superior SRAM minimum operating voltage characteristics are achieved due to Vt variability reduction from HK/MG. Analog circuit functionality is demonstrated by a fully integrated PLL circuitry without any modification to process.\",\"PeriodicalId\":309622,\"journal\":{\"name\":\"2009 International Symposium on VLSI Technology, Systems, and Applications\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-04-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Symposium on VLSI Technology, Systems, and Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTSA.2009.5159305\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on VLSI Technology, Systems, and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTSA.2009.5159305","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High-κ/metal gate low power bulk technology - Performance evaluation of standard CMOS logic circuits, microprocessor critical path replicas, and SRAM for 45nm and beyond
This paper presents performance evaluation of high-κ/metal gate (HK/MG) process on an industry standard 45nm low power microprocessor built on bulk substrate. CMOS devices built with HK/MG demonstrate 50% improvement in NFET and 65% improvement in PFET drive current when compared with industry standard 45nm Poly/SiON devices. No additional stress elements were used for this performance gain. The critical path circuits of this low power microprocessor built with HK/MG show dynamic performance gain over 50% at same supply voltage and 36% lower dynamic energy at same performance. Superior SRAM minimum operating voltage characteristics are achieved due to Vt variability reduction from HK/MG. Analog circuit functionality is demonstrated by a fully integrated PLL circuitry without any modification to process.