高κ/金属栅极低功耗批量技术-标准CMOS逻辑电路,微处理器关键路径副本和45纳米及以上SRAM的性能评估

D. Park, K. Stein, K. Schruefer, Y. Lee, J. Han, W. Li, H. Yin, C. Pacha, N. Kim, M. Ostermayr, M. Eller, S. Kim, K. Kim, S. Han, K. von Arnim, N. Moumen, M. Hatzistergos, T. Tang, R. Loesing, X. Chen, D. Jaeger, H. Zhuang, J. Chen, W. Yan, T. Kanarsky, M. Chowdhury, J. Haetty, D. Schepis, M. Chudzik, V.-Y. Theon, S. Samavedam, V. Narayanan, M. Sherony, R. Lindsay, A. Steegen, R. Divakaruni, M. Khare
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引用次数: 0

摘要

本文介绍了高κ/金属栅极(HK/MG)工艺在工业标准45nm低功耗微处理器上的性能评价。与工业标准的45纳米Poly/SiON器件相比,用HK/MG制造的CMOS器件的fet提高了50%,fet驱动电流提高了65%。为了提高性能,没有使用额外的应力元件。采用HK/MG构建的低功耗微处理器关键路径电路在相同电源电压下动态性能提高50%以上,在相同性能下动态能量降低36%。优越的SRAM最小工作电压特性,由于Vt变异性从HK/MG降低实现。模拟电路的功能由一个完全集成的锁相环电路来演示,而不需要对过程进行任何修改。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High-κ/metal gate low power bulk technology - Performance evaluation of standard CMOS logic circuits, microprocessor critical path replicas, and SRAM for 45nm and beyond
This paper presents performance evaluation of high-κ/metal gate (HK/MG) process on an industry standard 45nm low power microprocessor built on bulk substrate. CMOS devices built with HK/MG demonstrate 50% improvement in NFET and 65% improvement in PFET drive current when compared with industry standard 45nm Poly/SiON devices. No additional stress elements were used for this performance gain. The critical path circuits of this low power microprocessor built with HK/MG show dynamic performance gain over 50% at same supply voltage and 36% lower dynamic energy at same performance. Superior SRAM minimum operating voltage characteristics are achieved due to Vt variability reduction from HK/MG. Analog circuit functionality is demonstrated by a fully integrated PLL circuitry without any modification to process.
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