用于高速并行总线中串扰减少的8B9B编码

2016 IEEE 25th Conference on Electrical Performance Of Electronic Packaging And Systems (EPEPS) Pub Date : 2016-10-01 DOI:10.1109/EPEPS.2016.7835411

Sunil R. Sudhakaran, R. Newcomb

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引用次数: 2

摘要

本文提出了一种减少高速并行总线串扰的编码和译码方案。该方案基于改进的斐波那契序列，并在一些即将到来的内存接口中引入了潜在的好处。该方案为串扰为主的接口(如现有的存储接口)提供了可观的发展前景。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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8B9B encoding for crosstalk reduction in a high-speed parallel bus

This paper presents a new encoding and corresponding decoding scheme to reduce crosstalk on a high-speed parallel bus. The scheme is based on a modified Fibonacci sequence and is introduced along with potential benefits in some upcoming memory interfaces. The scheme provides appreciable eye opening for interfaces dominated by crosstalk such as existing memory interfaces.

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来源期刊

2016 IEEE 25th Conference on Electrical Performance Of Electronic Packaging And Systems (EPEPS)

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