{"title":"多输入单相时钟触发器系列","authors":"R. Hobson, Allan R. Dyck","doi":"10.1109/GLSV.1999.757423","DOIUrl":null,"url":null,"abstract":"The design of a versatile CMOS semi-static true singlephase clock flip-flop family is presented. It naturally supports multiple, multiplexed, inputs. Asynchronous Set/Reset are easily implemented. Switching power is lower than for some other semi-static flip-flop techniques.","PeriodicalId":127222,"journal":{"name":"Proceedings Ninth Great Lakes Symposium on VLSI","volume":"885 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A multiple-input single-phase clock flip-flop family\",\"authors\":\"R. Hobson, Allan R. Dyck\",\"doi\":\"10.1109/GLSV.1999.757423\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The design of a versatile CMOS semi-static true singlephase clock flip-flop family is presented. It naturally supports multiple, multiplexed, inputs. Asynchronous Set/Reset are easily implemented. Switching power is lower than for some other semi-static flip-flop techniques.\",\"PeriodicalId\":127222,\"journal\":{\"name\":\"Proceedings Ninth Great Lakes Symposium on VLSI\",\"volume\":\"885 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-03-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Ninth Great Lakes Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GLSV.1999.757423\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Ninth Great Lakes Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GLSV.1999.757423","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A multiple-input single-phase clock flip-flop family
The design of a versatile CMOS semi-static true singlephase clock flip-flop family is presented. It naturally supports multiple, multiplexed, inputs. Asynchronous Set/Reset are easily implemented. Switching power is lower than for some other semi-static flip-flop techniques.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
