混合SOI-外延CMOS结构中超薄SOI (UTSOI)电路的功率门控方案

2006 International Symposium on VLSI Design, Automation and Test Pub Date : 2006-04-26 DOI:10.1109/VDAT.2006.258120

S. Lo, K. Das, C. Chuang, J. Sleight

{"title":"混合SOI-外延CMOS结构中超薄SOI (UTSOI)电路的功率门控方案","authors":"S. Lo, K. Das, C. Chuang, J. Sleight","doi":"10.1109/VDAT.2006.258120","DOIUrl":null,"url":null,"abstract":"Several novel schemes of implementing MTCMOS circuits in hybrid UTSOI-epitaxial CMOS structures are proposed and analyzed through comprehensive circuit simulations. The schemes offer intrinsic high circuit density and facilitate header/footer body biasing techniques for performance enhancement and leakage reduction. The effectiveness in improving active-mode performance, and reducing virtual supply bounce and standby leakage power is demonstrated","PeriodicalId":356198,"journal":{"name":"2006 International Symposium on VLSI Design, Automation and Test","volume":"269 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Power-Gating Schemes for Ultra-Thin SOI (UTSOI) Circuits in Hybrid SOI-Epitaxial CMOS Structures\",\"authors\":\"S. Lo, K. Das, C. Chuang, J. Sleight\",\"doi\":\"10.1109/VDAT.2006.258120\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Several novel schemes of implementing MTCMOS circuits in hybrid UTSOI-epitaxial CMOS structures are proposed and analyzed through comprehensive circuit simulations. The schemes offer intrinsic high circuit density and facilitate header/footer body biasing techniques for performance enhancement and leakage reduction. The effectiveness in improving active-mode performance, and reducing virtual supply bounce and standby leakage power is demonstrated\",\"PeriodicalId\":356198,\"journal\":{\"name\":\"2006 International Symposium on VLSI Design, Automation and Test\",\"volume\":\"269 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-04-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 International Symposium on VLSI Design, Automation and Test\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VDAT.2006.258120\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Symposium on VLSI Design, Automation and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2006.258120","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

提出了几种在utsoi -外延混合CMOS结构中实现MTCMOS电路的新方案，并通过全面的电路仿真进行了分析。该方案提供了固有的高电路密度，并促进了头/脚体偏置技术，以提高性能和减少泄漏。实验证明了该方法在提高主动模式性能、降低虚拟电源弹跳和待机漏功率方面的有效性

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Power-Gating Schemes for Ultra-Thin SOI (UTSOI) Circuits in Hybrid SOI-Epitaxial CMOS Structures

Several novel schemes of implementing MTCMOS circuits in hybrid UTSOI-epitaxial CMOS structures are proposed and analyzed through comprehensive circuit simulations. The schemes offer intrinsic high circuit density and facilitate header/footer body biasing techniques for performance enhancement and leakage reduction. The effectiveness in improving active-mode performance, and reducing virtual supply bounce and standby leakage power is demonstrated

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2006 International Symposium on VLSI Design, Automation and Test

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