深亚微米SOI mosfet中的短沟道效应

L. T. Su, J. B. Jacobs, J. E. Chung, D. Antoniadis
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引用次数: 29

摘要

与体硅技术相比,薄膜、完全耗尽的绝缘体上硅(SOI) mosfet具有潜在的改进隔离性、降低亚阈值斜率和降低寄生电容的优点,因此目前备受关注。此外,对于将器件缩放到深亚微米区域,SOI为减少短通道效应提供了独特的选择。以往的研究表明,调整硅膜厚度和埋地氧化物厚度对降低SOI短通道效应很重要。然而,要在SOI中充分利用这些选项,必须仔细检查设计权衡。在本文中,研究了SOI中的短通道效应,并将其与传统的块体器件进行了比较,以扩展到深亚微米区域。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Short-channel effects in deep-submicrometer SOI MOSFETS
Thin-film, fully-depleted silicon-on-insulator (SOI) MOSFETs are currently of great interest due to potentially improved isolation, reduced subthreshold slope, and reduced parasitic capacitances as compared to bulk silicon technology. In addition, for scaling devices into the deep-submicrometer region, SOI offers unique options for the reduction of short-channel effects. Previous work has shown that scaling silicon film thickness and buried oxide thickness are important in the reduction of SOI short-channel effects. However, to fully exploit these options in SOI, a careful examination of the design tradeoffs is necessary. In this paper, short-channel effects in SOI are examined in comparison to conventional bulk devices for scaling into the deep-submicrometer region.<>
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