{"title":"在基于缓存的开关级模拟器中利用层次结构","authors":"L. G. Jones","doi":"10.1109/EDAC.1992.205924","DOIUrl":null,"url":null,"abstract":"The article presents a caching method that significantly reduces the cost of subnetwork evaluation during switch-level simulation. The method speeds up simulation by as much as a factor of two. While caching may require additional memory it is shown how the structural hierarchy can be exploited to quickly identify subnetworks computing identical functions, merge their cache tables and significantly reduce the memory requirements.<<ETX>>","PeriodicalId":285019,"journal":{"name":"[1992] Proceedings The European Conference on Design Automation","volume":"61 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Exploiting hierarchy in a cache-based switch-level simulator\",\"authors\":\"L. G. Jones\",\"doi\":\"10.1109/EDAC.1992.205924\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The article presents a caching method that significantly reduces the cost of subnetwork evaluation during switch-level simulation. The method speeds up simulation by as much as a factor of two. While caching may require additional memory it is shown how the structural hierarchy can be exploited to quickly identify subnetworks computing identical functions, merge their cache tables and significantly reduce the memory requirements.<<ETX>>\",\"PeriodicalId\":285019,\"journal\":{\"name\":\"[1992] Proceedings The European Conference on Design Automation\",\"volume\":\"61 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-03-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1992] Proceedings The European Conference on Design Automation\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDAC.1992.205924\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1992] Proceedings The European Conference on Design Automation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDAC.1992.205924","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Exploiting hierarchy in a cache-based switch-level simulator
The article presents a caching method that significantly reduces the cost of subnetwork evaluation during switch-level simulation. The method speeds up simulation by as much as a factor of two. While caching may require additional memory it is shown how the structural hierarchy can be exploited to quickly identify subnetworks computing identical functions, merge their cache tables and significantly reduce the memory requirements.<>