10nm触点选择性ALD Mo沉积

2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM)(IITC/MAM) Pub Date : 2023-05-01 DOI:10.1109/IITC/MAM57687.2023.10154783

M. H. van der Veen, J. Maes, O. Pedreira, C. Zhu, D. Tierno, S. Datta, N. Jourdan, S. Decoster, C. Wu, M. Mousa, Y. Byun, H. Struyf, S. Park, Z. Tokei

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引用次数: 0

摘要

在2nm节点测试车上，探索了Mo的选择性原子层沉积(ALD)来填充10nm的触点。ALD Mo沉积对介质(SiO2，低k OSG3.0, SiCN)具有高度选择性，并选择性地沉积在底部Ru路由接触层上。在不检测电介质中的Mo的情况下，获得了10-20nm范围内的无障碍Mo。宽高比(AR)为2的MP24通孔中Mo的电阻为~ 50Ω。在去除金属化过程中因空气破裂而引入的顶部界面氧化物后，预计会进一步降低电阻。可靠性分析表明，在Mo-Cu金属化体系中没有观察到应力引起的空化现象。此外，仅在连接的Cu顶部沟槽中观察到通孔电迁移失效，而坚固的ALD Mo通孔则完好无损。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Selective ALD Mo Deposition in 10nm Contacts

Selective atomic layer deposition (ALD) of Mo is explored to fill 10nm contacts in a 2 nm node test vehicle. The ALD Mo deposition is highly selective towards the dielectrics (SiO2, low-k OSG3.0, SiCN), and deposits selectively on the bottom Ru routing contact layer. Barrierless Mo via fill levels in the range of 10-20nm are obtained without detecting Mo in the dielectrics of the stack. The resistance of the Mo in MP24 vias with aspect ratio (AR) 2 is ~ 50Ω. Further resistance reduction is expected upon removing the top interfacial oxide introduced by an air break during metallization. The reliability shows that stress induced voiding is not observed for the Mo-Cu metallized system. Additionally, the via electromigration failures are only observed in the connecting Cu top trench, leaving the robust ALD Mo vias intact.

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来源期刊

2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM)(IITC/MAM)

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