{"title":"Gb/s多滴总线的盲自适应混合信号DFE","authors":"H. Fredriksson, C. Svensson","doi":"10.1109/VDAT.2006.258165","DOIUrl":null,"url":null,"abstract":"This paper presents a mixed signal decision feedback equalizer (DFE) efficiently implementing sign-sign least-mean-square (SS-LMS) coefficient updating, offset estimation and compensation. The equalizer is designed for multi-drop buses and has 16 six bit fully programmable filter coefficients. The equalizer filter is implemented with a novel carry-save-DAC architecture eliminating the carry propagation limiting factor. Measurement results from a test chip are presented showing no transmission errors and good clock skew robustness when receiving data at 700 Mb/s over a heavily polluted channel. The test chip also includes bit error rate (BER) measurement circuits and equalized eye-chart extraction","PeriodicalId":356198,"journal":{"name":"2006 International Symposium on VLSI Design, Automation and Test","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Blind Adaptive Mixed-Signal DFE for Gb/s, Multi-Drop, Buses\",\"authors\":\"H. Fredriksson, C. Svensson\",\"doi\":\"10.1109/VDAT.2006.258165\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a mixed signal decision feedback equalizer (DFE) efficiently implementing sign-sign least-mean-square (SS-LMS) coefficient updating, offset estimation and compensation. The equalizer is designed for multi-drop buses and has 16 six bit fully programmable filter coefficients. The equalizer filter is implemented with a novel carry-save-DAC architecture eliminating the carry propagation limiting factor. Measurement results from a test chip are presented showing no transmission errors and good clock skew robustness when receiving data at 700 Mb/s over a heavily polluted channel. The test chip also includes bit error rate (BER) measurement circuits and equalized eye-chart extraction\",\"PeriodicalId\":356198,\"journal\":{\"name\":\"2006 International Symposium on VLSI Design, Automation and Test\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-04-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 International Symposium on VLSI Design, Automation and Test\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VDAT.2006.258165\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Symposium on VLSI Design, Automation and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2006.258165","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Blind Adaptive Mixed-Signal DFE for Gb/s, Multi-Drop, Buses
This paper presents a mixed signal decision feedback equalizer (DFE) efficiently implementing sign-sign least-mean-square (SS-LMS) coefficient updating, offset estimation and compensation. The equalizer is designed for multi-drop buses and has 16 six bit fully programmable filter coefficients. The equalizer filter is implemented with a novel carry-save-DAC architecture eliminating the carry propagation limiting factor. Measurement results from a test chip are presented showing no transmission errors and good clock skew robustness when receiving data at 700 Mb/s over a heavily polluted channel. The test chip also includes bit error rate (BER) measurement circuits and equalized eye-chart extraction
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