T. Vasen, P. Ramvall, A. Afzalian, C. Thelander, K. Dick, M. Holland, G. Doornbos, S. W. Wang, R. Oxland, G. Vellianitis, M. V. van Dal, B. Duriez, J. Ramírez, R. Droopad, L. Wernersson, L. Samuelson, T.K. Chen, Y. Yeo, M. Passlack
{"title":"直径为12 - 15nm的纳米线GAA n- mosfet","authors":"T. Vasen, P. Ramvall, A. Afzalian, C. Thelander, K. Dick, M. Holland, G. Doornbos, S. W. Wang, R. Oxland, G. Vellianitis, M. V. van Dal, B. Duriez, J. Ramírez, R. Droopad, L. Wernersson, L. Samuelson, T.K. Chen, Y. Yeo, M. Passlack","doi":"10.1109/VLSIT.2016.7573417","DOIUrl":null,"url":null,"abstract":"InAs nanowires (NW) grown by MOCVD with diameter d as small as 10 nm and gate-all-around (GAA) MOSFETs with d = 12-15 nm are demonstrated. I<sub>on</sub> = 314 μA/μm, and S<sub>sat</sub> =68 mV/dec was achieved at V<sub>dd</sub> = 0.5 V (I<sub>off</sub> = 0.1 μA/μm). Highest g<sub>m</sub> measured is 2693 μS/μm. Device performance is enabled by small diameter and optimized high-k/InAs gate stack process. Device performance tradeoffs between g<sub>m</sub>, R<sub>on</sub>, and I<sub>min</sub> are discussed.","PeriodicalId":129300,"journal":{"name":"2016 IEEE Symposium on VLSI Technology","volume":"418 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"InAs nanowire GAA n-MOSFETs with 12–15 nm diameter\",\"authors\":\"T. Vasen, P. Ramvall, A. Afzalian, C. Thelander, K. Dick, M. Holland, G. Doornbos, S. W. Wang, R. Oxland, G. Vellianitis, M. V. van Dal, B. Duriez, J. Ramírez, R. Droopad, L. Wernersson, L. Samuelson, T.K. Chen, Y. Yeo, M. Passlack\",\"doi\":\"10.1109/VLSIT.2016.7573417\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"InAs nanowires (NW) grown by MOCVD with diameter d as small as 10 nm and gate-all-around (GAA) MOSFETs with d = 12-15 nm are demonstrated. I<sub>on</sub> = 314 μA/μm, and S<sub>sat</sub> =68 mV/dec was achieved at V<sub>dd</sub> = 0.5 V (I<sub>off</sub> = 0.1 μA/μm). Highest g<sub>m</sub> measured is 2693 μS/μm. Device performance is enabled by small diameter and optimized high-k/InAs gate stack process. Device performance tradeoffs between g<sub>m</sub>, R<sub>on</sub>, and I<sub>min</sub> are discussed.\",\"PeriodicalId\":129300,\"journal\":{\"name\":\"2016 IEEE Symposium on VLSI Technology\",\"volume\":\"418 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2016.7573417\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2016.7573417","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
InAs nanowire GAA n-MOSFETs with 12–15 nm diameter
InAs nanowires (NW) grown by MOCVD with diameter d as small as 10 nm and gate-all-around (GAA) MOSFETs with d = 12-15 nm are demonstrated. Ion = 314 μA/μm, and Ssat =68 mV/dec was achieved at Vdd = 0.5 V (Ioff = 0.1 μA/μm). Highest gm measured is 2693 μS/μm. Device performance is enabled by small diameter and optimized high-k/InAs gate stack process. Device performance tradeoffs between gm, Ron, and Imin are discussed.
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