奇怪的一对:IP-XACT和univerCM集成异构嵌入式系统

Diego Braga, F. Fummi, G. Pravadelli, S. Vinco
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引用次数: 2

摘要

现代嵌入式系统需要几个异构组件之间的紧密集成,包括数字和模拟硬件,以及依赖于硬件的软件。在文献中,缺乏一个完整的方法,既允许重用,同时又支持异构组件的正确集成。实际上,传统的方法要么依赖于同质的自顶向下的方法(不允许重用),要么依赖于联合模拟(不保证正确的集成)。本文提出将IP-XACT与UNIVERCM相结合。前者是IEEE标准,用于规定数字ip的接口和通信方式。后者是一种计算模型,允许以同构的方式表示开始的异构组件。这样,本文就利用IP-XACT来支持一般异构组件的集成,提取组件接口,生成必要的连接模块。此外,UNIVERCM允许生成组件行为的同构表示(在自下而上的流程中),以允许对生成的组件和最终系统进行模拟和验证。因此,这个奇怪的对允许系统通信的集成和验证。这种新方法的有效性已经在复杂的异构基准测试中得到了证明。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The strange pair: IP-XACT and univerCM to integrate heterogeneous embedded systems
Modern embedded systems require a tight integration among several heterogeneous components including digital and analog HW, as well as HW-dependent SW. In literature there is a lack of a complete approach, allowing reuse and at the same time supporting correct integration of heterogeneous components. Indeed, traditional approaches rely either on homogeneous top-down methodologies (that do not allow reuse) or on co-simulation (that does not guarantee correct integration). This paper proposes to combine IP-XACT and UNIVERCM. The former is an IEEE standard for specifying interface and communication style of digital IPs. The latter is a computational model that allows to represent the starting heterogeneous components in a homogeneous way. In this way, IP-XACT is used in this paper to support the integration of general heterogeneous components, to extract component interfaces and to generate the necessary connecting modules. Furthermore, UNIVERCM allows to generate a homogeneous representation of the components behavior (in a bottom-up flow) to allow simulation and validation of the generated components and of the final system. Thus, this strange pair allows integration and validation of system communication. The effectiveness of this novel approach has been proven on complex heterogeneous benchmarks.
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