{"title":"低成本多芯片模块的可测试性和信号完整性","authors":"A. Omer, A. Flint","doi":"10.1109/ICISS.1996.552426","DOIUrl":null,"url":null,"abstract":"The design process for low-cost multichip modules is presented. Modifications to the design are often made in order to increase testability. Some of these modifications can degrade signal integrity, however. The important aspects to consider in order to make rational design tradeoffs are presented.","PeriodicalId":131620,"journal":{"name":"1996 Proceedings. Eighth Annual IEEE International Conference on Innovative Systems in Silicon","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Testability and signal integrity in a low cost multichip module\",\"authors\":\"A. Omer, A. Flint\",\"doi\":\"10.1109/ICISS.1996.552426\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The design process for low-cost multichip modules is presented. Modifications to the design are often made in order to increase testability. Some of these modifications can degrade signal integrity, however. The important aspects to consider in order to make rational design tradeoffs are presented.\",\"PeriodicalId\":131620,\"journal\":{\"name\":\"1996 Proceedings. Eighth Annual IEEE International Conference on Innovative Systems in Silicon\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-10-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1996 Proceedings. Eighth Annual IEEE International Conference on Innovative Systems in Silicon\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICISS.1996.552426\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1996 Proceedings. Eighth Annual IEEE International Conference on Innovative Systems in Silicon","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICISS.1996.552426","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Testability and signal integrity in a low cost multichip module
The design process for low-cost multichip modules is presented. Modifications to the design are often made in order to increase testability. Some of these modifications can degrade signal integrity, however. The important aspects to consider in order to make rational design tradeoffs are presented.