A Study on a Tether-Less Approach Towards Micro-Transfer-Printing of Large-Footprint Power Micro-Inductor Chiplets

In recent years, need for large-scale, multi-layer, high-capacity integration for electronic systems has sky-rocketed. In this regard, a novel heterogeneous integration technique called Micro-transfer-printing $(\mu \mathbf{TP})$ has attracted a lot of attention due to its unique ability to integrate chiplets from heterogeneous sources on to a target substrate. Typically, the chiplets are picked up from a donor substrate using an elastomer stamp by breaking the surrounding micro-tethers and then printed onto a target substrate for further processing. Despite its success in applications like sensors, photovoltaics, photonics, etc., $\mu \mathbf{TP}$ finds its limitation in handling chiplet dimensions larger than 100 $\mathbf{x}\ 100\ \mathrm{x}\ 20\ \mu \mathbf{m}^{3}$. Therefore, reports on $\mu \mathbf{TP}$ of passive components like micro-inductors and micro-transformers with dimension in mm x mm and thickness of 100s of $\mu \mathbf{m}$ are non-existent. In this paper, a completely novel, non-classical, tether-less approach has been demonstrated for micro-inductors with large footprint. This paper also reports a customized PDMS stamp fabrication and optimized post-fabrication sample preparation steps, such as, substrate thinning and polishing while retaining device performance intact.