Three-dimensional integration technology of separate SOI layers for photodetectors and signal processors of CMOS image sensors

We report on three-dimensional (3-D) integration technology of separate silicon-on-insulator (SOI) layers for photodetectors and signal processors of CMOS image sensors. Photodiode, A/D convertor, and counter were integrated in two SOI layers that were vertically connected by embedded Au electrodes, thereby enabling pixel-parallel operation of image sensor. Photodiode has a P+/N/P-structure to suppress the dark current. We developed the image sensor and confirmed its performance of a wide dynamic range of 96 dB and high resolution of 16 bit. The sensor is promising to next-generation ultimate imaging devices.